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Bug 32485 - Invalid PPC CTR loop with 128bit integers
Summary: Invalid PPC CTR loop with 128bit integers
Status: RESOLVED FIXED
Alias: None
Product: libraries
Classification: Unclassified
Component: Backend: PowerPC (show other bugs)
Version: 4.0
Hardware: PC All
: P normal
Assignee: Unassigned LLVM Bugs
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2017-04-01 05:40 PDT by Tim Neumann
Modified: 2017-04-10 19:15 PDT (History)
2 users (show)

See Also:
Fixed By Commit(s):


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Description Tim Neumann 2017-04-01 05:40:17 PDT
Compiling the below IR with llc -O1 (Debug Assertions enabled, affects at least LLVM 4.0 & Master) triggers an unreachable:

```
Invalid PPC CTR loop!
UNREACHABLE executed at /home/logic/build-tmp/llvm-master/src/lib/Target/PowerPC/PPCCTRLoops.cpp:722!

[...]

0.	Program arguments: ../../../../../llvm-master/build/bin/llc -O1 core.red-4.ll
1.	Running pass 'Function Pass Manager' on module 'core.red-4.ll'.
2.	Running pass 'PowerPC CTR Loops Verify' on function '@_Crash_Fn'
```

IR:

```
; ModuleID = 'bugpoint-reduced-simplified.bc'
source_filename = "bugpoint-output-7eb0c3b.bc"
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

; Function Attrs: uwtable
define fastcc void @_Crash_Fn() unnamed_addr #0 {
entry-block:
  br label %_Label_0

_Label_0:                                         ; preds = %_Label_0, %entry-block
  %result.0138 = phi i128 [ %5, %_Label_0 ], [ 0, %entry-block ]
  %iter.sroa.0.0137 = phi i8* [ %0, %_Label_0 ], [ undef, %entry-block ]
  %0 = getelementptr inbounds i8, i8* %iter.sroa.0.0137, i64 1
  %1 = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 %result.0138, i128 undef) #2
  %2 = extractvalue { i128, i1 } %1, 0
  %3 = tail call { i128, i1 } @llvm.sadd.with.overflow.i128(i128 %2, i128 0) #2
  %4 = extractvalue { i128, i1 } %3, 1
  %5 = extractvalue { i128, i1 } %3, 0
  %6 = icmp eq i8* %0, null
  br i1 %6, label %bb66.loopexit, label %_Label_0

bb66.loopexit:                                    ; preds = %_Label_0
  unreachable
}

; Function Attrs: nounwind readnone
declare { i128, i1 } @llvm.sadd.with.overflow.i128(i128, i128) #1

; Function Attrs: nounwind readnone
declare { i128, i1 } @llvm.smul.with.overflow.i128(i128, i128) #1

attributes #0 = { uwtable }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind }
```
Comment 1 Tim Neumann 2017-04-01 09:54:26 PDT
This issue can be worked around by applying the patch below, which makes the optimiser assume that any intrinsic taking 128 bit integers as an argument might use CTR.


diff --git a/lib/Target/PowerPC/PPCCTRLoops.cpp b/lib/Target/PowerPC/PPCCTRLoops.cpp
index 197be8b..764e274 100644
--- a/lib/Target/PowerPC/PPCCTRLoops.cpp
+++ b/lib/Target/PowerPC/PPCCTRLoops.cpp
@@ -247,6 +247,13 @@ bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
         // sin, cos, exp and log are always calls.
         unsigned Opcode = 0;
         if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
+          // Preemtively assume intrinsics operating on 128 integers use CTR
+          for (unsigned OID = 0; OID < CI->getNumArgOperands(); OID++) {
+            if (isLargeIntegerTy(false, CI->getArgOperand(OID)->getType()->getScalarType())) {
+              return true;
+            }
+          }
+
           switch (F->getIntrinsicID()) {
           default: continue;
           // If we have a call to ppc_is_decremented_ctr_nonzero, or ppc_mtctr
--
Comment 2 Hal Finkel 2017-04-10 19:15:33 PDT
Fixed in r299910.