Volume

Dagstuhl Seminar Proceedings, Volume 7361

Publication Details

  • published at: 2008-02-06
  • Publisher: Schloss Dagstuhl – Leibniz-Zentrum für Informatik

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Document
DOI: 10.4230/DagSemProc.07361.1
07361 Abstracts Collection – Programming Models for Ubiquitous Parallelism

Authors: David Chi-Leung Wong, Albert Cohen, María J. Garzarán, Christian Lengauer, and Samuel P. Midkiff

Abstract
From 02.09. to 07.09.2007, the Dagstuhl Seminar 07361 ``Programming Models for Ubiquitous Parallelism'' was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar as well as abstracts of seminar results and ideas are put together in this paper. The first section describes the seminar topics and goals in general. Links to extended abstracts or full papers are provided, if available.
Cite as

David Chi-Leung Wong, Albert Cohen, María J. Garzarán, Christian Lengauer, and Samuel P. Midkiff. 07361 Abstracts Collection – Programming Models for Ubiquitous Parallelism. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, pp. 1-17, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{wong_et_al:DagSemProc.07361.1,
  author =	{Wong, David Chi-Leung and Cohen, Albert and Garzar\'{a}n, Mar{\'\i}a J. and Lengauer, Christian and Midkiff, Samuel P.},
  title =	{{07361 Abstracts Collection – Programming Models for Ubiquitous Parallelism}},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  pages =	{1--17},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2008},
  volume =	{7361},
  editor =	{Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.1},
  URN =		{urn:nbn:de:0030-drops-13770},
  doi =		{10.4230/DagSemProc.07361.1},
  annote =	{Keywords: Parallel programming models, transactional memory, languages, compilers, optimizations, architecture, automatic parallelization}
}
Document
DOI: 10.4230/DagSemProc.07361.2
07361 Introduction – Programming Models for Ubiquitous Parallelism

Authors: David Chi-Leung Wong, Albert Cohen, María J. Garzarán, Christian Lengauer, and Samuel P. Midkiff

Abstract
The goal of the seminar is to present a broad view of the research challenges and ongoing efforts to improve productivity, scalability, efficiency and reliability of general-purpose and embedded parallel programming.
Cite as

David Chi-Leung Wong, Albert Cohen, María J. Garzarán, Christian Lengauer, and Samuel P. Midkiff. 07361 Introduction – Programming Models for Ubiquitous Parallelism. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{wong_et_al:DagSemProc.07361.2,
  author =	{Wong, David Chi-Leung and Cohen, Albert and Garzar\'{a}n, Mar{\'\i}a J. and Lengauer, Christian and Midkiff, Samuel P.},
  title =	{{07361 Introduction – Programming Models for Ubiquitous Parallelism}},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2008},
  volume =	{7361},
  editor =	{Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.2},
  URN =		{urn:nbn:de:0030-drops-13736},
  doi =		{10.4230/DagSemProc.07361.2},
  annote =	{Keywords: Programming Models for Ubiquitous Parallelism}
}
Document
DOI: 10.4230/DagSemProc.07361.3
A Case for Deconstructing Hardware Transactional Memory Systems

Authors: Mark D. Hill, Derek Hower, Kevin E. Moore, Michael M. Swift, Haris Volos, and David A. Wood

Abstract
Major hardware and software vendors are curious about transactional memory (TM), but are understandably cautious about committing to hardware changes. Our thesis is that deconstructing transactional memory into separate, interchangeable components facilitates TM adoption in two ways. First, it aids hardware TM refinement, allowing vendors to adopt TM earlier, knowing that they can more easily refine aspects later. Second, it enables the components to be applied to other uses, including reliability, security, performance, and correctness, providing value even if TM is not widely used. We develop some evidence for our thesis via experience with LogTM variants and preliminary case studies of scalable watchpoints and race recording for deterministic replay.
Cite as

Mark D. Hill, Derek Hower, Kevin E. Moore, Michael M. Swift, Haris Volos, and David A. Wood. A Case for Deconstructing Hardware Transactional Memory Systems. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, pp. 1-8, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{hill_et_al:DagSemProc.07361.3,
  author =	{Hill, Mark D. and Hower, Derek and Moore, Kevin E. and Swift, Michael M. and Volos, Haris and Wood, David A.},
  title =	{{A Case for Deconstructing Hardware Transactional Memory Systems}},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  pages =	{1--8},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2008},
  volume =	{7361},
  editor =	{Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.3},
  URN =		{urn:nbn:de:0030-drops-13759},
  doi =		{10.4230/DagSemProc.07361.3},
  annote =	{Keywords: Hardware transactional memory}
}
Document
DOI: 10.4230/DagSemProc.07361.4
Parallelism through Digital Circuit Design

Authors: John O'Donnell

Abstract
Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed efficiently on ordinary parallel computers, including multicores. A class of data parallel algorithms is identified which have characteristics that make implementation on multiprocessors inefficient, but they are well suited for direct design as digital circuits. This leads to a programming model called circuit parallelism. The characteristics of circuit parallel algorithms are discussed, and a prototype system for supporting them is described.
Cite as

John O'Donnell. Parallelism through Digital Circuit Design. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, pp. 1-9, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{odonnell:DagSemProc.07361.4,
  author =	{O'Donnell, John},
  title =	{{Parallelism through Digital Circuit Design}},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  pages =	{1--9},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2008},
  volume =	{7361},
  editor =	{Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.4},
  URN =		{urn:nbn:de:0030-drops-13724},
  doi =		{10.4230/DagSemProc.07361.4},
  annote =	{Keywords: Circuit parallelism, data parallelism, FPGA}
}
Document
DOI: 10.4230/DagSemProc.07361.5
Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures

Authors: Armin Größlinger

Abstract
The model-based transformation of loop programs is a way of detecting fine-grained parallelism in sequential programs. One of the challenges is to agglomerate the parallelism to a coarser grain, in order to map the operations of the program to the available cores in a multicore architecture. We consider shared-memory multicores as target architecture for space-time mapped loop programs and make some observations concerning code generation, load balancing and cache effects.
Cite as

Armin Größlinger. Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures. In Programming Models for Ubiquitous Parallelism. Dagstuhl Seminar Proceedings, Volume 7361, pp. 1-12, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2008)

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@InProceedings{grolinger:DagSemProc.07361.5,
  author =	{Gr\"{o}{\ss}linger, Armin},
  title =	{{Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures}},
  booktitle =	{Programming Models for Ubiquitous Parallelism},
  pages =	{1--12},
  series =	{Dagstuhl Seminar Proceedings (DagSemProc)},
  ISSN =	{1862-4405},
  year =	{2008},
  volume =	{7361},
  editor =	{Albert Cohen and Mar{\'\i}a J. Garzar\'{a}n and Christian Lengauer and Samuel P. Midkiff},
  publisher =	{Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
  address =	{Dagstuhl, Germany},
  URL =		{https://drops.dagstuhl.de/entities/document/10.4230/DagSemProc.07361.5},
  URN =		{urn:nbn:de:0030-drops-13748},
  doi =		{10.4230/DagSemProc.07361.5},
  annote =	{Keywords: Multicore, automatic parallelization, loop transformations, polyhedron model}
}

Filters

  • Authors
  • C
  • Cohen, Albert
  • G
  • Garzarán, María J.
  • Größlinger, Armin
  • H
  • Hill, Mark D.
  • Hower, Derek
  • L
  • Lengauer, Christian
  • M
  • Midkiff, Samuel P.
  • Moore, Kevin E.
  • O
  • O'Donnell, John
  • S
  • Swift, Michael M.
  • V
  • Volos, Haris
  • W
  • Wong, David Chi-Leung
  • Wood, David A.

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