Report number
| ATL-TILECAL-PROC-2017-016 |
Title
| Control system for ATLAS TileCal HVRemote boards |
Author(s)
| Pedro Martins, Filipe Manuel (LIP) ; Gurriana, Luis (LIP) ; Oleiro Seabra, Luis Filipe (LIP) ; Evans, Guiomar (U. Lisbon (main)) ; Gomes, Agostinho (LIP ; U. Lisbon (main)) ; Maio, Amelia (LIP ; U. Lisbon (main)) ; Pinto Silva Rato, Catia Sofia (U. Lisbon (main)) ; Almendra Sabino, Joao Maria (U. Lisbon (main)) ; Soares Augusto, Jose (U. Lisbon (main) ; Lisbon, INESC-ID) |
Corporate
Author(s)
| The ATLAS collaboration |
Collaboration
| ATLAS Collaboration |
Publication
| 2018 |
Imprint
| 03 Oct 2017 |
Number of pages
| 5 |
In:
| 16th International Conference on Accelerator and Large Experimental Physics Control Systems, Barcelona, Spain, 8 - 13 Oct 2017, pp.THPHA069 |
DOI
| 10.18429/JACoW-ICALEPCS2017-THPHA069
|
Subject category
| Particle Physics - Experiment |
Accelerator/Facility, Experiment
| CERN LHC ; ATLAS |
Abstract
| One of the proposed solutions for upgrading the high voltage (HV) system of Tilecal, the ATLAS hadron calorimeter, consists in removing the HV regulation boards from the detector and deploying them in a low-radiation room where there is permanent access for maintenance. This option requires many 100 m long HV cables but removes the requirement of radiation hard boards. That solution simplifies the control system of the HV regulation cards (called HVRemote). It consists of a Detector Control System (DCS) node linked to 256 HVRemote boards through a tree of Ethernet connections. Each HVRemote includes a smart Ethernet transceiver for converting data and commands from the DCS into serial peripheral interface (SPI) signals routed to SPI-capable devices in the HVRemote. The DCS connection to the transceiver and the control of some SPI-capable devices via Ethernet has been tested successfully. A test board (HVRemote-ctrl) with the interfacing sub-system of the HVRemote was fabricated. It is being tested through SPI-interfaces and several devices were already validated. A next version adds a few more ADC/DAC devices for checking their suitability for the final design. |
Copyright/License
| CC-BY-3.0 |