| Article | |
| Report number | arXiv:1707.05451 |
| Title | Design of a Trigger Data Serializer ASIC for the Upgrade of the ATLAS Forward Muon Spectrometer |
| Related title | Design of a Trigger Data Serializer ASIC for the Upgrade of the ATLAS Forward Muon Spectrometer |
| Author(s) | Wang, Jinhong (Michigan U.) ; Guan, Liang (Michigan U.) ; Chapman, J.W. (Michigan U.) ; Zhou, Bing (Michigan U.) ; Zhu, Junjie (Michigan U.) |
| Publication | 2017-11-09 |
| Imprint | 2017-07-17 |
| Number of pages | 8 |
| Note | 10 pages, 12 figures |
| In: | IEEE Trans. Nucl. Sci. 64 (2017) 2958-2965 |
| DOI | 10.1109/TNS.2017.2771266 |
| Subject category | physics.ins-det ; Detectors and Experimental Techniques |
| Accelerator/Facility, Experiment | CERN LHC ; ATLAS |
| Abstract | The small-strip Thin Gap Chamber (sTGC) will be used for both triggering and precision tracking purposes in the upgrade of the ATLAS forward muon spectrometer. Both sTGC pad and strip detectors are readout by a Trigger Data Serializer (TDS) ASIC in the trigger path. This ASIC has two operation modes to prepare trigger data from pad and strip detectors respectively. The pad mode (pad-TDS) collects the firing status for up to 104 pads from one detector layer and transmits the data at 4.8 Gbps to the pad trigger extractor every 25 ns. The pad trigger extractor collects pad-TDS data from eight detector layers and defines a region of interest along the path of a muon candidate. In the strip mode (strip-TDS), the deposited charges from up to 128 strips are buffered, time-stamped, and a trigger matching procedure is performed to read out strips underneath the region of interest. The strip-TDS output is also transmitted at 4.8 Gbps to the following FPGA processing circuits. Details about the ASIC design and test results are presented in this paper. |
| Copyright/License | arXiv nonexclusive-distrib. 1.0 |
Corresponding record in: Inspire
Record creato 2017-08-11, modificato l'ultima volta il 2023-06-29
