| CMS Note | |
| Report number | CMS-CR-2016-114 |
| Title | Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework. |
| Author(s) |
Amstutz, Christian (KIT, Karlsruhe, EKP) ; Ball, Fionn Amhairghen (Bristol U.) ; Balzer, Matthias Norbert (KIT, Karlsruhe, EKP) ; Brooke, James John (Bristol U.) ; Calligaris, Luigi (Rutherford) ; Cieri, Davide (Rutherford) ; Clement, Emyr John (Bristol U.) ; Hall, Geoffrey (Imperial Coll., London) ; Harbaum, Tanja Renate (KIT, Karlsruhe, EKP) ; Harder, Kristian (Rutherford) ; Hobson, Peter (Brunel U.) ; Iles, Gregory Michiel (Imperial Coll., London) ; James, Thomas Owen (Imperial Coll., London) ; Manolopoulos, Konstantinos (Rutherford) ; Matsushita, Takashi (Vienna, OAW) ; Morton, Alexander (Brunel U.) ; Newbold, David (Bristol U.) ; Paramesvaran, Sudarshan (Bristol U.) ; Pesaresi, Mark Franco (Imperial Coll., London) ; Reid, Ivan (Brunel U.) ; Rose, A. W ; Sander, Oliver (KIT, Karlsruhe, EKP) ; Schuh, Thomas (KIT, Karlsruhe, EKP) ; Shepherd-Themistocleous, Claire (Rutherford) ; Shtipliyski, Antoni (Imperial Coll., London) ; Summers, Sioni Paris (Imperial Coll., London) ; Tapper, Alexander (Imperial Coll., London) ; Tomalin, Ian (Rutherford) ; Uchida, Kirika (Imperial Coll., London) ; Vichoudis, Paschalis (CERN) ; Weber, M |
| Publication | 2016 |
| Imprint | 31 May 2016 |
| Number of pages | 8 |
| Published in: | 10.1109/RTC.2016.7543110 |
| Presented at | 20th IEEE-NPSS Real Time Conference, Padua, Italy, 5 - 10 Jun 2016 |
| DOI | 10.1109/RTC.2016.7543110 |
| Subject category | Detectors and Experimental Techniques |
| Accelerator/Facility, Experiment | CERN LHC ; CMS |
| Keywords | Tracker |
| Abstract | The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference for a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing. |
| Other source | Inspire |
| Copyright/License | Preprint: (License: CC-BY-4.0) |
Записът е създаден на 2016-06-27, последна промяна на 2018-06-07
