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Title	Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system
Author(s)	Yang, P (Hua-Zhong Normal U.) ; Aglieri, G (CERN) ; Cavicchioli, C (CERN) ; Chalmet, P L (Unlisted, FR) ; Chanlek, N (Suranaree U. of Tech.) ; Collu, A (Cagliari U. ; INFN, Italy) ; Gao, C (Hua-Zhong Normal U.) ; Hillemanns, H (CERN) ; Junique, A (CERN) ; Kofarago, M (CERN ; Utrecht U.) ; Keil, M (CERN) ; Kugathasan, T (CERN) ; Kim, D (Yonsei U.) ; Kim, J (Pusan Natl. U.) ; Lattuca, A (Turin U. ; INFN, Italy) ; Marin Tobon, C A (CERN) ; Marras, D (Cagliari U. ; INFN, Italy) ; Mager, M (CERN) ; Martinengo, P (CERN) ; Mazza, G (Turin U. ; INFN, Italy) ; Mugnier, H (Unlisted, FR) ; Musa, L (CERN) ; Puggioni, C (Cagliari U. ; INFN, Italy) ; Rousset, J (Unlisted, FR) ; Reidt, F (CERN ; Heidelberg U.) ; Riedler, P (CERN) ; Snoeys, W (CERN) ; Siddhanta, S (Cagliari U. ; INFN, Italy) ; Usai, G (Cagliari U. ; INFN, Italy) ; van Hoorne, J W (CERN ; Vienna, Tech. U.) ; Yi, J (Pusan Natl. U.)
Publication	2015
Number of pages	9
In:	Nucl. Instrum. Methods Phys. Res., A 785 (2015) 61-69
DOI	10.1016/j.nima.2015.02.063
Subject category	Detectors and Experimental Techniques
Abstract	Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.
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