CERN Accelerating science

ATLAS Slides
Report number	ATL-MUON-SLIDE-2014-814
Title	Trigger Data Serializer ASIC chip for the ATLAS New Small Wheel sTGC Detector
Author(s)	Wang, Jinhong (University of Michigan, Department of Physics)
Corporate author(s)	The ATLAS collaboration
Submitted to	Conference Information and Promotion Committee (CIP) for the IEEE – Nuclear Science Symposium and Medical Imaging Conference, and Room-Temperature Semiconductor X-Ray and Gamma-Ray Detectors workshop, Seattle, WA, USA, 8 - 15 Nov 2014
Submitted by	[email protected] on 15 Nov 2014
Subject category	Particle Physics - Experiment
Accelerator/Facility, Experiment	CERN LHC ; ATLAS
Abstract	The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon detectors for the Phase-I upgrade of the ATLAS New Small Wheel (NSW) muon detector. Signals from both the sTGC pad and strip detectors will be first read out by the Amplifier-Shaper-Discriminator (ASD) chip designed by the Brookhaven National Laboratory, and then collected and transmitted by a Trigger Data Serializer (TDS) chip at a rate of 4.8 Gbps to other related circuits. The pad-TDS chip checks the presence of pad hits and sends the information together with Bunching Crossing ID to the pad-trigger logic to define roads of interest. The strip-TDS chip collects and buffers strip charge information and transmits a range of strips within the road of interest to the router board located on the rim of the NSW. The large number of input channels (128 differential input channels), short time available to prepare and transmit trigger data (<100 ns), high speed output data rate (4.8 Gbps), harsh radiation environment (about 300 kRad), and low power consumption (<1 W) all impose great challenges for the design of this ASIC chip using the IBM 130 nm CMOS process. We present our design and preliminary test results of the TDS ASIC chip.