| Article | |
| Title | Development of a CMOS SOI pixel detector |
| Author(s) | Ishino, Hirokazu ; Arai, Y ; Hazumi, M ; Ikegami, Y ; Kohriki, T ; Tajima, O ; Terada, S ; Tsuboyama, T ; Unno, Y ; Ushiroda, Y ; Ikeda, H ; Hara, K ; Ishino, H ; Kawasaki, T ; Miyake, H ; Martin, E ; Varner, G ; Tajima, H ; Ohno, M ; Fukuda, K ; Komatsubara, H ; Ida, J |
| Affiliation | (Tokyo Institute of Technology, Tokyo, Japan) ; (IPNS, High Energy Accelerator Research Organization (KEK), Ibaraki, Japan) ; (ISAS, Japan Aerospace Exploration Agency (JAXA), Kanagawa, Japan) ; (Institute of Pure and Applied Science, University of Tsukuba, Ibaraki, Japan) ; (Department of Physics, Tokyo Institute of Technology, Tokyo, Japan) ; (Graduate School of Science and Technology, Niigata University, Niigata, Japan) ; (Department of Physics, Osaka University, Osaka, Japan) ; (Department of Physics and Astronomy, University of Hawaii, Honolulu, USA) ; (Stanford Linear Accelerator Center, Stanford, USA) ; (Oki Electric Industory Co. Ltd., Tokyo, Japan) |
| Collaboration | SOIPIX Group |
| Publication | CERN, 2007 |
| Number of pages | 4 |
| In: | Proceedings of the Twelfth Workshop on Electronics for LHC and Future Experiments, pp.263-266 |
| DOI | 10.5170/CERN-2007-001.263 |
| Subject category | Detectors and Experimental Techniques |
| Abstract | We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 m fullydepleted- SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5mm2 consisting of 20 x 20 um2 pixels have been designed and manufactured. Performance tests with a laser light illumination and a . ray radioactive source indicate successful operation of the detector. We also brie y discuss the back gate effect as well as the simulation study. |
Email contact: [email protected]
Record creato 2007-04-19, modificato l'ultima volta il 2016-11-22
