AMD NPU Firmware Upstreamed For The Ryzen AI AMDXDNA Driver Coming In Linux 6.14

[phoronix]

Phoronix: AMD NPU Firmware Upstreamed For The Ryzen AI AMDXDNA Driver Coming In Linux 6.14

With the AMDXDNA kernel driver for Ryzen AI NPU support on Linux now ready for merging and is queued in drm-misc-next for the Linux 6.14 kernel early next year, the AMD NPU firmware binaries have also now been upstreamed to linux-firmware.git for having the necessary firmware support in place...

https://www.phoronix.com/news/AMD-NPU-Firmware-Upstream

[Chugworth]

I still haven't seen a good example of what can be done with the NPU. It would be nice if a program like Frigate NVR could use the NPU instead of wanting a Google Coral chip.

[phoron]

I feel unable to understand the concept of "upstreaming" a binary. They may have uploaded it or shared it, but to upstream means the content is free enough for others downstream to work on it, and that doesn't apply to binaries.
I don't like any non-free firmware. But this is not particularly against AMD. I just think the article is poorly composed.

[royce]

Does this cover earlier ryzen models like the 7xxx and 8xxx series?

[N0dens]

From what I understand, this AMD XDNA are from what AMD got when they bought Xilinx. Does it means that it is an FPGA? Does it means that you can create your own firmware and have your FPGA do something else than the standard NPU work?

[nuetzel]

Does this cover earlier ryzen models like the 7xxx and 8xxx series?

Ryzen AI NPU XDNA

Starts with former mobile Ryzen 7000/8000/AI xxx.

[David Huang]

Does this cover earlier ryzen models like the 7xxx and 8xxx series?

The 1502 binary is for phoenix (7000) / hawk point (8000), and 17f0 ones are strix point (Ryzen AI 300 series)

[LtdJorge]

From what I understand, this AMD XDNA are from what AMD got when they bought Xilinx. Does it means that it is an FPGA? Does it means that you can create your own firmware and have your FPGA do something else than the standard NPU work?

I think it’s what Xilinx would call IP block, so an ASIC.

[_ONH_]

Nice to see phoenix upstreamed also.