Vector Pascal Compiler News

The latest version includes support for ARM64 code.
Currently passes all conformance tests except multi core compilation because the ARM virtual memory does not allow threads in Pascal to access variables in an enclosing scope, since these will be on a different stack. That causes no problems on Intel, but can cause segment faulsts on ARM. Multi core compilation is thus switched off if you select the ARM code generator.

The support for the obsolete xeon phi has now been replaced by more general and more useful AVX512 support using the compiler flag -cpuX86_64v4

1. Reliable AMD64 code generator now works with multi-core code under ubuntu 20, and WSL
2. AVX64 code generator also available that works under ubuntu and WSL
3. Updated manual.
4. New matrix library unit released which extends matrix operations to work on matrices on the heap. This includes a very much faster matrix multiply operator for large matrices.

Ubuntu no longer supports 32 bit code easily so we have had to change the default code generation model to AMD64. There were also complexities associated with the fact that you can no longer use the latest gcc linkers to link anything but RIP relative labels for 64 bit code. This means that the old AVX code generator AVX32 is no longer usable under 64 bit Ubuntu and a new code generator AVX64 has been added.

A new release of the Xeon Phi code generator which suceeds in vectorising some constructst that were previously unvectorisable has been unploaded in the latest install.jar.

The Xeon Phi code generator now supports some of the more novel features of the architecture like prefetching, gather instruction and fused multiply accumulate operations.

The Xeon Phi code generator is now incorporated in the standard install.zip file. It uses the updated ILCG system to optimise the abstract syntax tree to make use of the gather instructions on the MIC. To compile to the Xeon Phi use the option -cpuMIC . It works as a cross compiler and requires that you have on your path a version of gcc and as that have been renamed to micgcc and micas

The zip file installexperimental507.zip has a version with SIMD code generation for the MIC which is much faster than the previous MIC version. It has also fixed a bug in the use of mis matched string parameter sizes for the nasm assembler code generators.

A basic version of support for the Intel MIC is included in the experimental release. This may have had knock on effects on the AVX version so if you want to use the AVX version stick to the stable release.

Some bugs were discovered in the input and output of enumerated types and fixed today.

We have added an improved listing file facility so that the listings now say which lines in your programme have been parallelised

New release today which has better performance in the optimiser for the AVX32 when opt levels >0 are used