diff --git a/README.md b/README.md
index f65e8c74ed..0c8e39f106 100644
--- a/README.md
+++ b/README.md
@@ -129,6 +129,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :----: | :-------: | ---- | :-----: | :---- |
| :green_heart: | STM32C031C6 | [Nucleo C031C6](https://www.st.com/en/evaluation-tools/nucleo-c031c6.html) | *2.5.0* | |
| :green_heart: | STM32C071RB | [Nucleo C071RB](https://www.st.com/en/evaluation-tools/nucleo-c071rb.html) | *2.9.0* | |
+| :yellow_heart: | STM32C092RC | [Nucleo C092RC](https://www.st.com/en/evaluation-tools/nucleo-c092rc.html)| **2.11.0** | |
| :green_heart: | STM32F030R8 | [Nucleo F030R8](http://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | |
| :green_heart: | STM32F070RB | [Nucleo F070RB](http://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | *2.0.0* | |
| :green_heart: | STM32F072RB | [Nucleo F072RB](http://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | |
@@ -224,6 +225,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32C031F4
STM32C031F6 | Generic Board | *2.6.0* | |
| :yellow_heart: | STM32C071G8
STM32C071GB | Generic Board | **2.11.0** | |
| :green_heart: | STM32C071R8
STM32C071RB | Generic Board | *2.9.0* | |
+| :yellow_heart: | STM32C092CBT | Generic Board | **2.11.0** | |
+| :yellow_heart: | STM32C092RBT
STM32C092RCT | Generic Board | **2.11.0** | |
+| :yellow_heart: | STM32C092RCI | Generic Board | **2.11.0** | |
### Generic STM32F0 boards
diff --git a/boards.txt b/boards.txt
index 25340dc5d2..df2d8ed270 100644
--- a/boards.txt
+++ b/boards.txt
@@ -492,6 +492,20 @@ Nucleo_64.menu.pnum.NUCLEO_C071RB.build.st_extra_flags=-D{build.product_line} {b
Nucleo_64.menu.pnum.NUCLEO_C071RB.openocd.target=stm32c0x
Nucleo_64.menu.pnum.NUCLEO_C071RB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd
+# NUCLEO_C092RC board
+Nucleo_64.menu.pnum.NUCLEO_C092RC=Nucleo C092RC
+Nucleo_64.menu.pnum.NUCLEO_C092RC.node="NOD_C092RC"
+Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_size=262144
+Nucleo_64.menu.pnum.NUCLEO_C092RC.upload.maximum_data_size=30720
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.mcu=cortex-m0plus
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.board=NUCLEO_C092RC
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.series=STM32C0xx
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.product_line=STM32C092xx
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
+Nucleo_64.menu.pnum.NUCLEO_C092RC.build.st_extra_flags=-DSTM32C092xx {build.xSerial} -D__CORTEX_SC=0
+Nucleo_64.menu.pnum.NUCLEO_C092RC.openocd.target=stm32c0x
+Nucleo_64.menu.pnum.NUCLEO_C092RC.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
+
# NUCLEO_F030R8 board
Nucleo_64.menu.pnum.NUCLEO_F030R8=Nucleo F030R8
Nucleo_64.menu.pnum.NUCLEO_F030R8.node="NODE_F030R8,NUCLEO"
@@ -1834,6 +1848,42 @@ GenC0.menu.pnum.GENERIC_C071RBTX.build.product_line=STM32C071xx
GenC0.menu.pnum.GENERIC_C071RBTX.build.variant=STM32C0xx/C071R(8-B)T
GenC0.menu.pnum.GENERIC_C071RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C071.svd
+# Generic C092CBTx
+GenC0.menu.pnum.GENERIC_C092CBTX=Generic C092CBTx
+GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_size=131072
+GenC0.menu.pnum.GENERIC_C092CBTX.upload.maximum_data_size=30720
+GenC0.menu.pnum.GENERIC_C092CBTX.build.board=GENERIC_C092CBTX
+GenC0.menu.pnum.GENERIC_C092CBTX.build.product_line=STM32C092xx
+GenC0.menu.pnum.GENERIC_C092CBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
+GenC0.menu.pnum.GENERIC_C092CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
+
+# Generic C092RBTx
+GenC0.menu.pnum.GENERIC_C092RBTX=Generic C092RBTx
+GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_size=131072
+GenC0.menu.pnum.GENERIC_C092RBTX.upload.maximum_data_size=30720
+GenC0.menu.pnum.GENERIC_C092RBTX.build.board=GENERIC_C092RBTX
+GenC0.menu.pnum.GENERIC_C092RBTX.build.product_line=STM32C092xx
+GenC0.menu.pnum.GENERIC_C092RBTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
+GenC0.menu.pnum.GENERIC_C092RBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
+
+# Generic C092RCIx
+GenC0.menu.pnum.GENERIC_C092RCIX=Generic C092RCIx
+GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_size=262144
+GenC0.menu.pnum.GENERIC_C092RCIX.upload.maximum_data_size=30720
+GenC0.menu.pnum.GENERIC_C092RCIX.build.board=GENERIC_C092RCIX
+GenC0.menu.pnum.GENERIC_C092RCIX.build.product_line=STM32C092xx
+GenC0.menu.pnum.GENERIC_C092RCIX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
+GenC0.menu.pnum.GENERIC_C092RCIX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
+
+# Generic C092RCTx
+GenC0.menu.pnum.GENERIC_C092RCTX=Generic C092RCTx
+GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_size=262144
+GenC0.menu.pnum.GENERIC_C092RCTX.upload.maximum_data_size=30720
+GenC0.menu.pnum.GENERIC_C092RCTX.build.board=GENERIC_C092RCTX
+GenC0.menu.pnum.GENERIC_C092RCTX.build.product_line=STM32C092xx
+GenC0.menu.pnum.GENERIC_C092RCTX.build.variant=STM32C0xx/C092CBT_C092RBT_C092RC(I-T)
+GenC0.menu.pnum.GENERIC_C092RCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C0xx/STM32C092.svd
+
# Upload menu
GenC0.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
GenC0.menu.upload_method.swdMethod.upload.protocol=swd
diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h
index aaf37ad69a..23d2815f22 100644
--- a/libraries/SrcWrapper/inc/stm32_def.h
+++ b/libraries/SrcWrapper/inc/stm32_def.h
@@ -218,6 +218,11 @@ __STATIC_INLINE void LL_RTC_SetBinMixBCDU(RTC_TypeDef *RTCx, uint32_t BinMixBcdU
#define GPIO_AF1_SPI1 STM_PIN_AFNUM_MASK
#endif
+#if defined(STM32C0xx) && defined(USART3) && !defined(GPIO_AF7_USART3)
+ #define GPIO_AF7_USART3 ((uint8_t)0x07)
+#endif // STM32C0xx && !defined(USART3)
+
+
/**
* Libc porting layers
*/
diff --git a/libraries/SrcWrapper/inc/uart.h b/libraries/SrcWrapper/inc/uart.h
index 5d681407f8..6c466ebe8c 100644
--- a/libraries/SrcWrapper/inc/uart.h
+++ b/libraries/SrcWrapper/inc/uart.h
@@ -121,7 +121,7 @@ struct serial_s {
#define USART3_IRQn USART3_4_IRQn
#define USART3_IRQHandler USART3_4_IRQHandler
#endif /* STM32F091xC || STM32F098xx */
-#elif defined(STM32G0xx)
+#elif defined(STM32G0xx) || defined(STM32C0xx)
#if defined(LPUART2_BASE)
#define USART3_IRQn USART3_4_5_6_LPUART1_IRQn
#define USART3_IRQHandler USART3_4_5_6_LPUART1_IRQHandler
@@ -153,7 +153,7 @@ struct serial_s {
#endif /* STM32F091xC || STM32F098xx */
#elif defined(STM32L0xx)
#define USART4_IRQn USART4_5_IRQn
-#elif defined(STM32G0xx)
+#elif defined(STM32G0xx) || defined(STM32C0xx)
#if defined(LPUART2_BASE)
#define USART4_IRQn USART3_4_5_6_LPUART1_IRQn
#elif defined(LPUART1_BASE)
diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt
index 2a4d55b6b1..96bcad7e7b 100644
--- a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt
+++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/CMakeLists.txt
@@ -21,7 +21,9 @@ target_link_libraries(variant INTERFACE variant_usage)
add_library(variant_bin STATIC EXCLUDE_FROM_ALL
generic_clock.c
PeripheralPins.c
+ PeripheralPins_NUCLEO_C092RC.c
variant_generic.cpp
+ variant_NUCLEO_C092RC.cpp
)
target_link_libraries(variant_bin PUBLIC variant_usage)
diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c
index e9ca7b29a8..3cf436e56f 100644
--- a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c
+++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/generic_clock.c
@@ -21,8 +21,34 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+ __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+ RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
+ Error_Handler();
+ }
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld
new file mode 100644
index 0000000000..77257d156e
--- /dev/null
+++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/ldscript.ld
@@ -0,0 +1,187 @@
+/*
+******************************************************************************
+**
+** @file : LinkerScript.ld
+**
+** @author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for NUCLEO-C092RC Board embedding STM32C092RCTx Device from stm32c0 series
+** 256KBytes FLASH
+** 30KBytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2025 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp
new file mode 100644
index 0000000000..2df6c32199
--- /dev/null
+++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.cpp
@@ -0,0 +1,146 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2024, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_NUCLEO_C092RC)
+#include "pins_arduino.h"
+#include "stm32yyxx_ll_utils.h"
+
+// Digital PinName array
+const PinName digitalPin[] = {
+ PB_7, // D0
+ PB_6, // D1
+ PA_10, // D2
+ PC_7, // D3
+ PB_5, // D4
+ PB_4, // D5
+ PC_8, // D6
+ PA_8, // D7/A6
+ PA_9, // D8
+ PB_3, // D9
+ PA_15, // D10
+ PA_7, // D11/A7
+ PA_6, // D12/A8
+ PA_5, // D13/A9
+ PB_9, // D14
+ PB_8, // D15
+ PA_0, // D16/A0
+ PA_1, // D17/A1
+ PA_4, // D18/A2
+ PB_0, // D19/A3
+ PC_4, // D20/A4
+ PC_5, // D21/A5
+ PC_10, // D22
+ PC_12, // D23
+ PD_4, // D24
+ PD_0, // D25
+ PD_3, // D26
+ PA_13, // D27
+ PA_14, // D28
+ PC_6, // D29
+ PC_2, // D30
+ PC_13, // D31
+ PC_14, // D32
+ PC_15, // D33
+ PF_0, // D34
+ PF_1, // D35
+ PF_3, // D36
+ PB_2, // D37/A10
+ PB_11, // D38/A11
+ PC_11, // D39
+ PD_2, // D40
+ PD_1, // D41
+ PF_2, // D42
+ PD_5, // D43
+ PC_3, // D44
+ PC_9, // D45
+ PC_1, // D46
+ PA_3, // D47
+ PD_6, // D48
+ PA_12, // D49
+ PA_11, // D50
+ PB_12, // D51/A12
+ PA_2, // D52
+ PC_0, // D53
+ PB_1, // D54/A13
+ PB_15, // D55
+ PB_14, // D56
+ PB_13, // D57
+ PB_10, // D58/A14
+ PD_8, // D59
+ PD_9, // D60
+ PA_9_R, // D61
+ PA_10_R // D62
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+ 16, // A0, PA0
+ 17, // A1, PA1
+ 18, // A2, PA4
+ 19, // A3, PB0
+ 20, // A4, PC4
+ 21, // A5, PC5
+ 7, // A6, PA8
+ 11, // A7, PA7
+ 12, // A8, PA6
+ 13, // A9, PA5
+ 37, // A10, PB2
+ 38, // A11, PB11
+ 51, // A12, PB12
+ 54, // A13, PB1
+ 58 // A14, PB10
+};
+
+// ----------------------------------------------------------------------------
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+ __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
+ RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
+ Error_Handler();
+ }
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ARDUINO_NUCLEO_C092RC */
diff --git a/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h
new file mode 100644
index 0000000000..260d254962
--- /dev/null
+++ b/variants/STM32C0xx/C092CBT_C092RBT_C092RC(I-T)/variant_NUCLEO_C092RC.h
@@ -0,0 +1,205 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2024, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ * STM32 pins number
+ *----------------------------------------------------------------------------*/
+#define PB7 0
+#define PB6 1
+#define PA10 2
+#define PC7 3
+#define PB5 4
+#define PB4 5
+#define PC8 6
+#define PA8 PIN_A6
+#define PA9 8
+#define PB3 9
+#define PA15 10
+#define PA7 PIN_A7
+#define PA6 PIN_A8
+#define PA5 PIN_A9 // LED1
+#define PB9 14
+#define PB8 15
+#define PA0 PIN_A0
+#define PA1 PIN_A1
+#define PA4 PIN_A2
+#define PB0 PIN_A3
+#define PC4 PIN_A4
+#define PC5 PIN_A5
+// ST Morpho
+// CN7 Left Side
+#define PC10 22
+#define PC12 23
+#define PD4 24
+#define PD0 25
+#define PD3 26
+#define PA13 27 // SWD
+#define PA14 28 // SWD
+#define PC6 29
+#define PC2 30 // FDCAN_RX
+#define PC13 31 // USER_BTN
+#define PC14 32 // OSCX_IN
+#define PC15 33 // OSCX_OUT
+#define PF0 34 // OSC_IN
+#define PF1 35 // OSC_OUT
+#define PF3 36 // VBAT
+#define PB2 PIN_A10
+#define PB11 PIN_A11
+// CN7 Right Side
+#define PC11 39
+#define PD2 40
+#define PD1 41
+#define PF2 42 // NRST
+#define PD5 43
+// CN10 Left Side
+#define PC3 44 // FDCAN_TX
+// CN10 Right side
+#define PC9 45 // LED2
+#define PC1 46
+#define PA3 47 // RX
+#define PD6 48
+#define PA12 49
+#define PA11 50
+#define PB12 PIN_A12
+#define PA2 52 // TX
+#define PC0 53
+#define PB1 PIN_A13
+#define PB15 55
+#define PB14 56
+#define PB13 57
+#define PB10 PIN_A14
+#define PD8 59
+#define PD9 60
+#define PA9_R 61
+#define PA10_R 62
+
+// Alternate pins number
+#define PA0_ALT1 (PA0 | ALT1)
+#define PA0_ALT2 (PA0 | ALT2)
+#define PA1_ALT1 (PA1 | ALT1)
+#define PA1_ALT2 (PA1 | ALT2)
+#define PA2_ALT1 (PA2 | ALT1)
+#define PA2_ALT2 (PA2 | ALT2)
+#define PA3_ALT1 (PA3 | ALT1)
+#define PA3_ALT2 (PA3 | ALT2)
+#define PA4_ALT1 (PA4 | ALT1)
+#define PA4_ALT2 (PA4 | ALT2)
+#define PA5_ALT1 (PA5 | ALT1)
+#define PA5_ALT2 (PA5 | ALT2)
+#define PA6_ALT1 (PA6 | ALT1)
+#define PA7_ALT1 (PA7 | ALT1)
+#define PA7_ALT2 (PA7 | ALT2)
+#define PA7_ALT3 (PA7 | ALT3)
+#define PA8_ALT1 (PA8 | ALT1)
+#define PA8_ALT2 (PA8 | ALT2)
+#define PA8_ALT3 (PA8 | ALT3)
+#define PA8_ALT4 (PA8 | ALT4)
+#define PA8_ALT5 (PA8 | ALT5)
+#define PA9_ALT1 (PA9 | ALT1)
+#define PA10_ALT1 (PA10 | ALT1)
+#define PA15_ALT1 (PA15 | ALT1)
+#define PB0_ALT1 (PB0 | ALT1)
+#define PB1_ALT1 (PB1 | ALT1)
+#define PB1_ALT2 (PB1 | ALT2)
+#define PB1_ALT3 (PB1 | ALT3)
+#define PB3_ALT1 (PB3 | ALT1)
+#define PB3_ALT2 (PB3 | ALT2)
+#define PB5_ALT1 (PB5 | ALT1)
+#define PB6_ALT1 (PB6 | ALT1)
+#define PB6_ALT2 (PB6 | ALT2)
+#define PB6_ALT3 (PB6 | ALT3)
+#define PB6_ALT4 (PB6 | ALT4)
+#define PB6_ALT5 (PB6 | ALT5)
+#define PB7_ALT1 (PB7 | ALT1)
+#define PB7_ALT2 (PB7 | ALT2)
+#define PB7_ALT3 (PB7 | ALT3)
+#define PB7_ALT4 (PB7 | ALT4)
+#define PB8_ALT1 (PB8 | ALT1)
+#define PB9_ALT1 (PB9 | ALT1)
+#define PC6_ALT1 (PC6 | ALT1)
+#define PC7_ALT1 (PC7 | ALT1)
+#define PC8_ALT1 (PC8 | ALT1)
+#define PC9_ALT1 (PC9 | ALT1)
+#define PC14_ALT1 (PC14 | ALT1)
+
+#define NUM_DIGITAL_PINS 63
+#define NUM_REMAP_PINS 2
+#define NUM_ANALOG_INPUTS 15
+
+// On-board LED pin number
+#define LED1 PA5
+#define LED2 PC9
+#define LED_GREEN LED1
+#define LED_BLUE LED2
+#ifndef LED_BUILTIN
+ #define LED_BUILTIN LED_GREEN
+#endif
+
+// On-board user button
+#ifndef USER_BTN
+ #define USER_BTN PC13
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+ #define TIMER_TONE TIM14
+#endif
+#ifndef TIMER_SERVO
+ #define TIMER_SERVO TIM16
+#endif
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+ #define SERIAL_UART_INSTANCE 2
+#endif
+
+// Default pin used for generic 'Serial' instance
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+ #define PIN_SERIAL_RX PA3
+#endif
+#ifndef PIN_SERIAL_TX
+ #define PIN_SERIAL_TX PA2
+#endif
+
+#define HSE_VALUE (48000000U) /*!< Value of the External oscillator in Hz */
+
+/*----------------------------------------------------------------------------
+ * Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ // These serial port names are intended to allow libraries and architecture-neutral
+ // sketches to automatically default to the correct port name for a particular type
+ // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+ // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+ //
+ // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
+ //
+ // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
+ //
+ // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
+ //
+ // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
+ //
+ // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
+ // pins are NOT connected to anything by default.
+ #ifndef SERIAL_PORT_MONITOR
+ #define SERIAL_PORT_MONITOR Serial
+ #endif
+ #ifndef SERIAL_PORT_HARDWARE
+ #define SERIAL_PORT_HARDWARE Serial
+ #endif
+#endif