diff --git a/README.md b/README.md
index dbf9d0ed10..85af2dd6a6 100644
--- a/README.md
+++ b/README.md
@@ -492,6 +492,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| Status | Device(s) | Name | Release | Notes |
| :----: | :-------: | ---- | :-----: | :---- |
+| :yellow_heart: | STM32G474CEU | WeAct G474CE | **2.10.0** | [More info](https://github.com/WeActStudio/WeActStudio.STM32G474CoreBoard) |
| :green_heart: | STM32G431C6<br>STM32G431C8<br>STM32G431CB | Generic Board | *2.4.0* | |
| :green_heart: | STM32G431C6U<br>STM32G431C8U<br>STM32G431CBU | Generic Board | *2.0.0* | |
| :green_heart: | STM32G431M6<br>STM32G431M8<br>STM32G431MB | Generic Board | *2.4.0* | |
@@ -509,25 +510,29 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
| :green_heart: | STM32G471QC<br>STM32G471QE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G471RC<br>STM32G471RE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G471VC<br>STM32G471VE | Generic Board | *2.4.0* | |
-| :green_heart: | STM32G473CB<br>STM32G473CC<br>STM32G473CE | Generic Board | *2.4.0* | |
+| :green_heart: | STM32G473CBT<br>STM32G473CCT<br>STM32G473CET | Generic Board | *2.4.0* | |
+| :yellow_heart: | STM32G473CBU<br>STM32G473CCU<br>STM32G473CEU | Generic Board | **2.10.0** | |
| :green_heart: | STM32G473MB<br>STM32G473MC<br>STM32G473ME | Generic Board | *2.4.0* | |
| :green_heart: | STM32G473PB<br>STM32G473PC<br>STM32G473PE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G473QB<br>STM32G473QC<br>STM32G473QE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G473RB<br>STM32G473RC<br>STM32G473RE | Generic Board | *2.0.0* | |
| :green_heart: | STM32G473VB<br>STM32G473VC<br>STM32G473VE | Generic Board | *2.4.0* | |
-| :green_heart: | STM32G474CB<br>STM32G474CC<br>STM32G474CE | Generic Board | *2.4.0* | |
+| :green_heart: | STM32G474CBT<br>STM32G474CCT<br>STM32G474CET | Generic Board | *2.4.0* | |
+| :yellow_heart: | STM32G474CBU<br>STM32G474CCU<br>STM32G474CEU | Generic Board | **2.10.0** | |
| :green_heart: | STM32G474MB<br>STM32G474MC<br>STM32G474ME | Generic Board | *2.4.0* | |
| :green_heart: | STM32G474PB<br>STM32G474PC<br>STM32G474PE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G474QB<br>STM32G474QC<br>STM32G474QE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G474RB<br>STM32G474RC<br>STM32G474RE | Generic Board | *2.0.0* | |
| :green_heart: | STM32G474VB<br>STM32G474VC<br>STM32G474VE | Generic Board | *2.4.0* | |
-| :green_heart: | STM32G483CE | Generic Board | *2.4.0* | |
+| :green_heart: | STM32G483CET | Generic Board | *2.4.0* | |
+| :yellow_heart: | STM32G483CEU | Generic Board | **2.10.0** | |
| :green_heart: | STM32G483ME | Generic Board | *2.4.0* | |
| :green_heart: | STM32G483PE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G483QE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G483RE | Generic Board | *2.0.0* | |
| :green_heart: | STM32G483VE | Generic Board | *2.4.0* | |
-| :green_heart: | STM32G484CE | Generic Board | *2.4.0* | |
+| :green_heart: | STM32G484CET | Generic Board | *2.4.0* | |
+| :yellow_heart: | STM32G484CEU | Generic Board | **2.10.0** | |
| :green_heart: | STM32G484ME | Generic Board | *2.4.0* | |
| :green_heart: | STM32G484PE | Generic Board | *2.4.0* | |
| :green_heart: | STM32G484QE | Generic Board | *2.4.0* | |
diff --git a/boards.txt b/boards.txt
index 07fc51e3ad..08b4d3fa7e 100644
--- a/boards.txt
+++ b/boards.txt
@@ -7453,6 +7453,16 @@ GenG4.openocd.target=stm32g4x
GenG4.vid.0=0x0483
GenG4.pid.0=0x5740
+# WEACT_G474CE board
+GenG4.menu.pnum.WEACT_G474CE=WeAct G474CE
+GenG4.menu.pnum.WEACT_G474CE.upload.maximum_size=524288
+GenG4.menu.pnum.WEACT_G474CE.upload.maximum_data_size=131072
+GenG4.menu.pnum.WEACT_G474CE.build.board=WEACT_G474CE
+GenG4.menu.pnum.WEACT_G474CE.build.product_line=STM32G474xx
+GenG4.menu.pnum.WEACT_G474CE.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.WEACT_G474CE.build.variant_h=variant_{build.board}.h
+GenG4.menu.pnum.WEACT_G474CE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+
# Generic G431C6Tx
GenG4.menu.pnum.GENERIC_G431C6TX=Generic G431C6Tx
GenG4.menu.pnum.GENERIC_G431C6TX.upload.maximum_size=32768
@@ -7885,6 +7895,15 @@ GenG4.menu.pnum.GENERIC_G473CBTX.build.product_line=STM32G473xx
GenG4.menu.pnum.GENERIC_G473CBTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G473CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
+# Generic G473CBUx
+GenG4.menu.pnum.GENERIC_G473CBUX=Generic G473CBUx
+GenG4.menu.pnum.GENERIC_G473CBUX.upload.maximum_size=131072
+GenG4.menu.pnum.GENERIC_G473CBUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G473CBUX.build.board=GENERIC_G473CBUX
+GenG4.menu.pnum.GENERIC_G473CBUX.build.product_line=STM32G473xx
+GenG4.menu.pnum.GENERIC_G473CBUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G473CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
+
# Generic G473CCTx
GenG4.menu.pnum.GENERIC_G473CCTX=Generic G473CCTx
GenG4.menu.pnum.GENERIC_G473CCTX.upload.maximum_size=262144
@@ -7894,6 +7913,15 @@ GenG4.menu.pnum.GENERIC_G473CCTX.build.product_line=STM32G473xx
GenG4.menu.pnum.GENERIC_G473CCTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G473CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
+# Generic G473CCUx
+GenG4.menu.pnum.GENERIC_G473CCUX=Generic G473CCUx
+GenG4.menu.pnum.GENERIC_G473CCUX.upload.maximum_size=262144
+GenG4.menu.pnum.GENERIC_G473CCUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G473CCUX.build.board=GENERIC_G473CCUX
+GenG4.menu.pnum.GENERIC_G473CCUX.build.product_line=STM32G473xx
+GenG4.menu.pnum.GENERIC_G473CCUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G473CCUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
+
# Generic G473CETx
GenG4.menu.pnum.GENERIC_G473CETX=Generic G473CETx
GenG4.menu.pnum.GENERIC_G473CETX.upload.maximum_size=524288
@@ -7903,6 +7931,15 @@ GenG4.menu.pnum.GENERIC_G473CETX.build.product_line=STM32G473xx
GenG4.menu.pnum.GENERIC_G473CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G473CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
+# Generic G473CEUx
+GenG4.menu.pnum.GENERIC_G473CEUX=Generic G473CEUx
+GenG4.menu.pnum.GENERIC_G473CEUX.upload.maximum_size=524288
+GenG4.menu.pnum.GENERIC_G473CEUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G473CEUX.build.board=GENERIC_G473CEUX
+GenG4.menu.pnum.GENERIC_G473CEUX.build.product_line=STM32G473xx
+GenG4.menu.pnum.GENERIC_G473CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G473CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G473.svd
+
# Generic G473MBTx
GenG4.menu.pnum.GENERIC_G473MBTX=Generic G473MBTx
GenG4.menu.pnum.GENERIC_G473MBTX.upload.maximum_size=131072
@@ -8083,6 +8120,15 @@ GenG4.menu.pnum.GENERIC_G474CBTX.build.product_line=STM32G474xx
GenG4.menu.pnum.GENERIC_G474CBTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G474CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+# Generic G474CBUx
+GenG4.menu.pnum.GENERIC_G474CBUX=Generic G474CBUx
+GenG4.menu.pnum.GENERIC_G474CBUX.upload.maximum_size=131072
+GenG4.menu.pnum.GENERIC_G474CBUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G474CBUX.build.board=GENERIC_G474CBUX
+GenG4.menu.pnum.GENERIC_G474CBUX.build.product_line=STM32G474xx
+GenG4.menu.pnum.GENERIC_G474CBUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G474CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+
# Generic G474CCTx
GenG4.menu.pnum.GENERIC_G474CCTX=Generic G474CCTx
GenG4.menu.pnum.GENERIC_G474CCTX.upload.maximum_size=262144
@@ -8092,6 +8138,15 @@ GenG4.menu.pnum.GENERIC_G474CCTX.build.product_line=STM32G474xx
GenG4.menu.pnum.GENERIC_G474CCTX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G474CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+# Generic G474CCUx
+GenG4.menu.pnum.GENERIC_G474CCUX=Generic G474CCUx
+GenG4.menu.pnum.GENERIC_G474CCUX.upload.maximum_size=262144
+GenG4.menu.pnum.GENERIC_G474CCUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G474CCUX.build.board=GENERIC_G474CCUX
+GenG4.menu.pnum.GENERIC_G474CCUX.build.product_line=STM32G474xx
+GenG4.menu.pnum.GENERIC_G474CCUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G474CCUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+
# Generic G474CETx
GenG4.menu.pnum.GENERIC_G474CETX=Generic G474CETx
GenG4.menu.pnum.GENERIC_G474CETX.upload.maximum_size=524288
@@ -8101,6 +8156,15 @@ GenG4.menu.pnum.GENERIC_G474CETX.build.product_line=STM32G474xx
GenG4.menu.pnum.GENERIC_G474CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G474CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+# Generic G474CEUx
+GenG4.menu.pnum.GENERIC_G474CEUX=Generic G474CEUx
+GenG4.menu.pnum.GENERIC_G474CEUX.upload.maximum_size=524288
+GenG4.menu.pnum.GENERIC_G474CEUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G474CEUX.build.board=GENERIC_G474CEUX
+GenG4.menu.pnum.GENERIC_G474CEUX.build.product_line=STM32G474xx
+GenG4.menu.pnum.GENERIC_G474CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G474CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G474.svd
+
# Generic G474MBTx
GenG4.menu.pnum.GENERIC_G474MBTX=Generic G474MBTx
GenG4.menu.pnum.GENERIC_G474MBTX.upload.maximum_size=131072
@@ -8281,6 +8345,15 @@ GenG4.menu.pnum.GENERIC_G483CETX.build.product_line=STM32G483xx
GenG4.menu.pnum.GENERIC_G483CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G483CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G483.svd
+# Generic G483CEUx
+GenG4.menu.pnum.GENERIC_G483CEUX=Generic G483CEUx
+GenG4.menu.pnum.GENERIC_G483CEUX.upload.maximum_size=524288
+GenG4.menu.pnum.GENERIC_G483CEUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G483CEUX.build.board=GENERIC_G483CEUX
+GenG4.menu.pnum.GENERIC_G483CEUX.build.product_line=STM32G483xx
+GenG4.menu.pnum.GENERIC_G483CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G483CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G483.svd
+
# Generic G483METx
GenG4.menu.pnum.GENERIC_G483METX=Generic G483METx
GenG4.menu.pnum.GENERIC_G483METX.upload.maximum_size=524288
@@ -8344,6 +8417,15 @@ GenG4.menu.pnum.GENERIC_G484CETX.build.product_line=STM32G484xx
GenG4.menu.pnum.GENERIC_G484CETX.build.variant=STM32G4xx/G473C(B-C-E)T_G474C(B-C-E)T_G483CET_G484CET
GenG4.menu.pnum.GENERIC_G484CETX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G484.svd
+# Generic G484CEUx
+GenG4.menu.pnum.GENERIC_G484CEUX=Generic G484CEUx
+GenG4.menu.pnum.GENERIC_G484CEUX.upload.maximum_size=524288
+GenG4.menu.pnum.GENERIC_G484CEUX.upload.maximum_data_size=131072
+GenG4.menu.pnum.GENERIC_G484CEUX.build.board=GENERIC_G484CEUX
+GenG4.menu.pnum.GENERIC_G484CEUX.build.product_line=STM32G484xx
+GenG4.menu.pnum.GENERIC_G484CEUX.build.variant=STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU
+GenG4.menu.pnum.GENERIC_G484CEUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G484.svd
+
# Generic G484METx
GenG4.menu.pnum.GENERIC_G484METX=Generic G484METx
GenG4.menu.pnum.GENERIC_G484METX.upload.maximum_size=524288
diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake
index 5a7465fbc5..06cfe9a4a8 100644
--- a/cmake/boards_db.cmake
+++ b/cmake/boards_db.cmake
@@ -66880,6 +66880,88 @@ target_compile_options(GENERIC_G473CBTX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G473CBUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G473CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G473CBUX_MAXSIZE 131072)
+set(GENERIC_G473CBUX_MAXDATASIZE 131072)
+set(GENERIC_G473CBUX_MCU cortex-m4)
+set(GENERIC_G473CBUX_FPCONF "-")
+add_library(GENERIC_G473CBUX INTERFACE)
+target_compile_options(GENERIC_G473CBUX INTERFACE
+ "SHELL:-DSTM32G473xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G473CBUX_MCU}
+)
+target_compile_definitions(GENERIC_G473CBUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G473CBUX"
+ "BOARD_NAME=\"GENERIC_G473CBUX\""
+ "BOARD_ID=GENERIC_G473CBUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G473CBUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G473CBUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G473CBUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G473CBUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=131072"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G473CBUX_MCU}
+)
+
+add_library(GENERIC_G473CBUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G473CBUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CBUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G473CBUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G473CBUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G473CBUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G473CBUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G473CBUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G473CBUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G473CBUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G473CBUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G473CBUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G473CBUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G473CBUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CBUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G473CBUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CBUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G473CBUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G473CBUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G473CBUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G473CCTX
# -----------------------------------------------------------------------------
@@ -66962,6 +67044,88 @@ target_compile_options(GENERIC_G473CCTX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G473CCUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G473CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G473CCUX_MAXSIZE 262144)
+set(GENERIC_G473CCUX_MAXDATASIZE 131072)
+set(GENERIC_G473CCUX_MCU cortex-m4)
+set(GENERIC_G473CCUX_FPCONF "-")
+add_library(GENERIC_G473CCUX INTERFACE)
+target_compile_options(GENERIC_G473CCUX INTERFACE
+ "SHELL:-DSTM32G473xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G473CCUX_MCU}
+)
+target_compile_definitions(GENERIC_G473CCUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G473CCUX"
+ "BOARD_NAME=\"GENERIC_G473CCUX\""
+ "BOARD_ID=GENERIC_G473CCUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G473CCUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G473CCUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G473CCUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G473CCUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=262144"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G473CCUX_MCU}
+)
+
+add_library(GENERIC_G473CCUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G473CCUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CCUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G473CCUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G473CCUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G473CCUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G473CCUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G473CCUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G473CCUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G473CCUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G473CCUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G473CCUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G473CCUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G473CCUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CCUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G473CCUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CCUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G473CCUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G473CCUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G473CCUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G473CETX
# -----------------------------------------------------------------------------
@@ -67044,6 +67208,88 @@ target_compile_options(GENERIC_G473CETX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G473CEUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G473CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G473CEUX_MAXSIZE 524288)
+set(GENERIC_G473CEUX_MAXDATASIZE 131072)
+set(GENERIC_G473CEUX_MCU cortex-m4)
+set(GENERIC_G473CEUX_FPCONF "-")
+add_library(GENERIC_G473CEUX INTERFACE)
+target_compile_options(GENERIC_G473CEUX INTERFACE
+ "SHELL:-DSTM32G473xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G473CEUX_MCU}
+)
+target_compile_definitions(GENERIC_G473CEUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G473CEUX"
+ "BOARD_NAME=\"GENERIC_G473CEUX\""
+ "BOARD_ID=GENERIC_G473CEUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G473CEUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G473CEUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G473CEUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G473CEUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=524288"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G473CEUX_MCU}
+)
+
+add_library(GENERIC_G473CEUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G473CEUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CEUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G473CEUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G473CEUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G473CEUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G473CEUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G473CEUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G473CEUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G473CEUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G473CEUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G473CEUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G473CEUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G473CEUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CEUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G473CEUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G473CEUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G473CEUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G473CEUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G473CEUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G473MBTX
# -----------------------------------------------------------------------------
@@ -68766,6 +69012,88 @@ target_compile_options(GENERIC_G474CBTX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G474CBUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G474CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G474CBUX_MAXSIZE 131072)
+set(GENERIC_G474CBUX_MAXDATASIZE 131072)
+set(GENERIC_G474CBUX_MCU cortex-m4)
+set(GENERIC_G474CBUX_FPCONF "-")
+add_library(GENERIC_G474CBUX INTERFACE)
+target_compile_options(GENERIC_G474CBUX INTERFACE
+ "SHELL:-DSTM32G474xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G474CBUX_MCU}
+)
+target_compile_definitions(GENERIC_G474CBUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G474CBUX"
+ "BOARD_NAME=\"GENERIC_G474CBUX\""
+ "BOARD_ID=GENERIC_G474CBUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G474CBUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G474CBUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G474CBUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G474CBUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=131072"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G474CBUX_MCU}
+)
+
+add_library(GENERIC_G474CBUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G474CBUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CBUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G474CBUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G474CBUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G474CBUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G474CBUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G474CBUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G474CBUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G474CBUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G474CBUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G474CBUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G474CBUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G474CBUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CBUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G474CBUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CBUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G474CBUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G474CBUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G474CBUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G474CCTX
# -----------------------------------------------------------------------------
@@ -68848,6 +69176,88 @@ target_compile_options(GENERIC_G474CCTX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G474CCUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G474CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G474CCUX_MAXSIZE 262144)
+set(GENERIC_G474CCUX_MAXDATASIZE 131072)
+set(GENERIC_G474CCUX_MCU cortex-m4)
+set(GENERIC_G474CCUX_FPCONF "-")
+add_library(GENERIC_G474CCUX INTERFACE)
+target_compile_options(GENERIC_G474CCUX INTERFACE
+ "SHELL:-DSTM32G474xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G474CCUX_MCU}
+)
+target_compile_definitions(GENERIC_G474CCUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G474CCUX"
+ "BOARD_NAME=\"GENERIC_G474CCUX\""
+ "BOARD_ID=GENERIC_G474CCUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G474CCUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G474CCUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G474CCUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G474CCUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=262144"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G474CCUX_MCU}
+)
+
+add_library(GENERIC_G474CCUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G474CCUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CCUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G474CCUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G474CCUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G474CCUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G474CCUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G474CCUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G474CCUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G474CCUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G474CCUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G474CCUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G474CCUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G474CCUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CCUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G474CCUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CCUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G474CCUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G474CCUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G474CCUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G474CETX
# -----------------------------------------------------------------------------
@@ -68930,6 +69340,88 @@ target_compile_options(GENERIC_G474CETX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G474CEUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G474CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G474CEUX_MAXSIZE 524288)
+set(GENERIC_G474CEUX_MAXDATASIZE 131072)
+set(GENERIC_G474CEUX_MCU cortex-m4)
+set(GENERIC_G474CEUX_FPCONF "-")
+add_library(GENERIC_G474CEUX INTERFACE)
+target_compile_options(GENERIC_G474CEUX INTERFACE
+ "SHELL:-DSTM32G474xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G474CEUX_MCU}
+)
+target_compile_definitions(GENERIC_G474CEUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G474CEUX"
+ "BOARD_NAME=\"GENERIC_G474CEUX\""
+ "BOARD_ID=GENERIC_G474CEUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G474CEUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G474CEUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G474CEUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G474CEUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=524288"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G474CEUX_MCU}
+)
+
+add_library(GENERIC_G474CEUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G474CEUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CEUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G474CEUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G474CEUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G474CEUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G474CEUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G474CEUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G474CEUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G474CEUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G474CEUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G474CEUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G474CEUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G474CEUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CEUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G474CEUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G474CEUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G474CEUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G474CEUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G474CEUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G474MBTX
# -----------------------------------------------------------------------------
@@ -70488,6 +70980,88 @@ target_compile_options(GENERIC_G483CETX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G483CEUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G483CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G483CEUX_MAXSIZE 524288)
+set(GENERIC_G483CEUX_MAXDATASIZE 131072)
+set(GENERIC_G483CEUX_MCU cortex-m4)
+set(GENERIC_G483CEUX_FPCONF "-")
+add_library(GENERIC_G483CEUX INTERFACE)
+target_compile_options(GENERIC_G483CEUX INTERFACE
+ "SHELL:-DSTM32G483xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G483CEUX_MCU}
+)
+target_compile_definitions(GENERIC_G483CEUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G483CEUX"
+ "BOARD_NAME=\"GENERIC_G483CEUX\""
+ "BOARD_ID=GENERIC_G483CEUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G483CEUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G483CEUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G483CEUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G483CEUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=524288"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G483CEUX_MCU}
+)
+
+add_library(GENERIC_G483CEUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G483CEUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G483CEUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G483CEUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G483CEUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G483CEUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G483CEUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G483CEUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G483CEUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G483CEUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G483CEUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G483CEUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G483CEUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G483CEUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G483CEUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G483CEUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G483CEUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G483CEUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G483CEUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G483CEUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G483METX
# -----------------------------------------------------------------------------
@@ -71062,6 +71636,88 @@ target_compile_options(GENERIC_G484CETX_xusb_HSFS INTERFACE
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
)
+# GENERIC_G484CEUX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_G484CEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(GENERIC_G484CEUX_MAXSIZE 524288)
+set(GENERIC_G484CEUX_MAXDATASIZE 131072)
+set(GENERIC_G484CEUX_MCU cortex-m4)
+set(GENERIC_G484CEUX_FPCONF "-")
+add_library(GENERIC_G484CEUX INTERFACE)
+target_compile_options(GENERIC_G484CEUX INTERFACE
+ "SHELL:-DSTM32G484xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G484CEUX_MCU}
+)
+target_compile_definitions(GENERIC_G484CEUX INTERFACE
+ "STM32G4xx"
+ "ARDUINO_GENERIC_G484CEUX"
+ "BOARD_NAME=\"GENERIC_G484CEUX\""
+ "BOARD_ID=GENERIC_G484CEUX"
+ "VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_G484CEUX INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${GENERIC_G484CEUX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_G484CEUX INTERFACE
+ "LINKER:--default-script=${GENERIC_G484CEUX_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=524288"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${GENERIC_G484CEUX_MCU}
+)
+
+add_library(GENERIC_G484CEUX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_G484CEUX_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G484CEUX_serial_generic INTERFACE)
+target_compile_options(GENERIC_G484CEUX_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_G484CEUX_serial_none INTERFACE)
+target_compile_options(GENERIC_G484CEUX_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_G484CEUX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_G484CEUX_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_G484CEUX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_G484CEUX_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_G484CEUX_usb_HID INTERFACE)
+target_compile_options(GENERIC_G484CEUX_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_G484CEUX_usb_none INTERFACE)
+target_compile_options(GENERIC_G484CEUX_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G484CEUX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_G484CEUX_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(GENERIC_G484CEUX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_G484CEUX_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_G484CEUX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_G484CEUX_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# GENERIC_G484METX
# -----------------------------------------------------------------------------
@@ -110448,6 +111104,88 @@ target_link_options(VCCGND_F407ZG_MINI_hid INTERFACE
)
+# WEACT_G474CE
+# -----------------------------------------------------------------------------
+
+set(WEACT_G474CE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU")
+set(WEACT_G474CE_MAXSIZE 524288)
+set(WEACT_G474CE_MAXDATASIZE 131072)
+set(WEACT_G474CE_MCU cortex-m4)
+set(WEACT_G474CE_FPCONF "-")
+add_library(WEACT_G474CE INTERFACE)
+target_compile_options(WEACT_G474CE INTERFACE
+ "SHELL:-DSTM32G474xx "
+ "SHELL:"
+ "SHELL:"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${WEACT_G474CE_MCU}
+)
+target_compile_definitions(WEACT_G474CE INTERFACE
+ "STM32G4xx"
+ "ARDUINO_WEACT_G474CE"
+ "BOARD_NAME=\"WEACT_G474CE\""
+ "BOARD_ID=WEACT_G474CE"
+ "VARIANT_H=\"variant_WEACT_G474CE.h\""
+)
+target_include_directories(WEACT_G474CE INTERFACE
+ ${CMAKE_CURRENT_LIST_DIR}/../system/STM32G4xx
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Inc
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32G4xx_HAL_Driver/Src
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Include/
+ ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/
+ ${WEACT_G474CE_VARIANT_PATH}
+)
+
+target_link_options(WEACT_G474CE INTERFACE
+ "LINKER:--default-script=${WEACT_G474CE_VARIANT_PATH}/ldscript.ld"
+ "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+ "LINKER:--defsym=LD_MAX_SIZE=524288"
+ "LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+ "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+ -mcpu=${WEACT_G474CE_MCU}
+)
+
+add_library(WEACT_G474CE_serial_disabled INTERFACE)
+target_compile_options(WEACT_G474CE_serial_disabled INTERFACE
+ "SHELL:"
+)
+add_library(WEACT_G474CE_serial_generic INTERFACE)
+target_compile_options(WEACT_G474CE_serial_generic INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(WEACT_G474CE_serial_none INTERFACE)
+target_compile_options(WEACT_G474CE_serial_none INTERFACE
+ "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(WEACT_G474CE_usb_CDC INTERFACE)
+target_compile_options(WEACT_G474CE_usb_CDC INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(WEACT_G474CE_usb_CDCgen INTERFACE)
+target_compile_options(WEACT_G474CE_usb_CDCgen INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(WEACT_G474CE_usb_HID INTERFACE)
+target_compile_options(WEACT_G474CE_usb_HID INTERFACE
+ "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(WEACT_G474CE_usb_none INTERFACE)
+target_compile_options(WEACT_G474CE_usb_none INTERFACE
+ "SHELL:"
+)
+add_library(WEACT_G474CE_xusb_FS INTERFACE)
+target_compile_options(WEACT_G474CE_xusb_FS INTERFACE
+ "SHELL:"
+)
+add_library(WEACT_G474CE_xusb_HS INTERFACE)
+target_compile_options(WEACT_G474CE_xusb_HS INTERFACE
+ "SHELL:-DUSE_USB_HS"
+)
+add_library(WEACT_G474CE_xusb_HSFS INTERFACE)
+target_compile_options(WEACT_G474CE_xusb_HSFS INTERFACE
+ "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
# WEACT_H562RG
# -----------------------------------------------------------------------------
diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt
index 2a4d55b6b1..bb65361bdb 100644
--- a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt
+++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/CMakeLists.txt
@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
generic_clock.c
PeripheralPins.c
variant_generic.cpp
+ variant_WEACT_G474CE.cpp
)
target_link_libraries(variant_bin PUBLIC variant_usage)
diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/generic_clock.c b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/generic_clock.c
index fd8ce7402c..b58fe5f220 100644
--- a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/generic_clock.c
+++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/generic_clock.c
@@ -23,8 +23,65 @@
*/
WEAK void SystemClock_Config(void)
{
- /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+#ifdef USBCON
+ RCC_CRSInitTypeDef pInit = {};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
+#endif
+
+ /* Configure the main internal regulator output voltage */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /* Initializes the RCC Oscillators */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 75;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+
+ /* Initializes the CPU, AHB and APB buses clocks */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+ Error_Handler();
+ }
+
+#ifdef USBCON
+ /* Enable the SYSCFG APB clock */
+ __HAL_RCC_CRS_CLK_ENABLE();
+
+ /* Configures CRS */
+ pInit.Prescaler = RCC_CRS_SYNC_DIV1;
+ pInit.Source = RCC_CRS_SYNC_SOURCE_USB;
+ pInit.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+ pInit.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+ pInit.ErrorLimitValue = 34;
+ pInit.HSI48CalibrationValue = 32;
+
+ HAL_RCCEx_CRSConfig(&pInit);
+
+ /* Initializes the peripherals clocks */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
+ Error_Handler();
+ }
+#endif
}
#endif /* ARDUINO_GENERIC_* */
diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/ldscript.ld b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/ldscript.ld
new file mode 100644
index 0000000000..9ec558bba2
--- /dev/null
+++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/ldscript.ld
@@ -0,0 +1,185 @@
+/*
+******************************************************************************
+**
+** @file : LinkerScript.ld
+**
+** @author : Auto-generated by STM32CubeIDE
+**
+** @brief : Linker script for STM32G473CBUx Device from STM32G4 series
+** 128Kbytes FLASH
+** 128Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is, without any warranty
+** of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2022 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
+ FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab (READONLY) : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM (READONLY) : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array (READONLY) :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array (READONLY) :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array (READONLY) :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/variant_WEACT_G474CE.cpp b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/variant_WEACT_G474CE.cpp
new file mode 100644
index 0000000000..7f77b7eee5
--- /dev/null
+++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/variant_WEACT_G474CE.cpp
@@ -0,0 +1,149 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2024, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_WEACT_G474CE)
+#include "pins_arduino.h"
+
+// Digital PinName array
+const PinName digitalPin[] = {
+ PA_0, // D0/A0
+ PA_1, // D1/A1
+ PA_2, // D2/A2
+ PA_3, // D3/A3
+ PA_4, // D4/A4
+ PA_5, // D5/A5
+ PA_6, // D6/A6
+ PA_7, // D7/A7
+ PA_8, // D8/A8
+ PA_9, // D9/A9
+ PA_10, // D10
+ PA_11, // D11
+ PA_12, // D12
+ PA_13, // D13/SWDIO
+ PA_14, // D14/SWCLK
+ PA_15, // D15
+ PB_0, // D16/A10
+ PB_1, // D17/A11
+ PB_2, // D18/A12
+ PB_3, // D19
+ PB_4, // D20
+ PB_5, // D21
+ PB_6, // D22
+ PB_7, // D23
+ PB_8, // D24
+ PB_9, // D25
+ PB_10, // D26
+ PB_11, // D27/A13
+ PB_12, // D28/A14
+ PB_13, // D29/A15
+ PB_14, // D30/A16
+ PB_15, // D31/A17
+ PC_4, // D32/A18
+ PC_6, // D33/LED
+ PC_10, // D34
+ PC_11, // D35
+ PC_13, // D36/BTN
+ PC_14, // D37
+ PC_15, // D38
+ PF_0, // D39/A19
+ PF_1, // D40/A20
+ PG_10 // D41
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+ 0, // A0, PA0
+ 1, // A1, PA1
+ 2, // A2, PA2
+ 3, // A3, PA3
+ 4, // A4, PA4
+ 5, // A5, PA5
+ 6, // A6, PA6
+ 7, // A7, PA7
+ 8, // A8, PA8
+ 9, // A9, PA9
+ 16, // A10, PB0
+ 17, // A11, PB1
+ 18, // A12, PB2
+ 27, // A13, PB11
+ 28, // A14, PB12
+ 29, // A15, PB13
+ 30, // A16, PB14
+ 31, // A17, PB15
+ 32, // A18, PC4
+ 39, // A19, PF0
+ 40 // A20, PF1
+};
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+/**
+ * @brief System Clock Configuration
+ */
+WEAK void SystemClock_Config(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+#ifdef USBCON
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
+#endif
+
+ /* Configure the main internal regulator output voltage */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+ /* Initializes the CPU, AHB and APB busses clocks */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48
+ | RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV6;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ Error_Handler();
+ }
+ /* Initializes the CPU, AHB and APB busses clocks */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+ Error_Handler();
+ }
+
+#ifdef USBCON
+ /* Initializes the peripherals clocks */
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
+ Error_Handler();
+ }
+#endif
+}
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* ARDUINO_NUCLEO_G431RB */
diff --git a/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/variant_WEACT_G474CE.h b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/variant_WEACT_G474CE.h
new file mode 100644
index 0000000000..2d66c2ab32
--- /dev/null
+++ b/variants/STM32G4xx/G473C(B-C-E)U_G474C(B-C-E)U_G483CEU_G484CEU/variant_WEACT_G474CE.h
@@ -0,0 +1,213 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2024, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ * STM32 pins number
+ *----------------------------------------------------------------------------*/
+#define PA0 PIN_A0
+#define PA1 PIN_A1
+#define PA2 PIN_A2
+#define PA3 PIN_A3
+#define PA4 PIN_A4
+#define PA5 PIN_A5
+#define PA6 PIN_A6
+#define PA7 PIN_A7
+#define PA8 PIN_A8
+#define PA9 PIN_A9
+#define PA10 10
+#define PA11 11
+#define PA12 12
+#define PA13 13
+#define PA14 14
+#define PA15 15
+#define PB0 PIN_A10
+#define PB1 PIN_A11
+#define PB2 PIN_A12
+#define PB3 19
+#define PB4 20
+#define PB5 21
+#define PB6 22
+#define PB7 23
+#define PB8 24
+#define PB9 25
+#define PB10 26
+#define PB11 PIN_A13
+#define PB12 PIN_A14
+#define PB13 PIN_A15
+#define PB14 PIN_A16
+#define PB15 PIN_A17
+#define PC4 PIN_A18
+#define PC6 33 // LED
+#define PC10 34
+#define PC11 35
+#define PC13 36 // BTN
+#define PC14 37
+#define PC15 38
+#define PF0 PIN_A19
+#define PF1 PIN_A20
+#define PG10 41
+
+// Alternate pins number
+#define PA0_ALT1 (PA0 | ALT1)
+#define PA1_ALT1 (PA1 | ALT1)
+#define PA1_ALT2 (PA1 | ALT2)
+#define PA2_ALT1 (PA2 | ALT1)
+#define PA2_ALT2 (PA2 | ALT2)
+#define PA3_ALT1 (PA3 | ALT1)
+#define PA3_ALT2 (PA3 | ALT2)
+#define PA4_ALT1 (PA4 | ALT1)
+#define PA6_ALT1 (PA6 | ALT1)
+#define PA7_ALT1 (PA7 | ALT1)
+#define PA7_ALT2 (PA7 | ALT2)
+#define PA7_ALT3 (PA7 | ALT3)
+#define PA9_ALT1 (PA9 | ALT1)
+#define PA10_ALT1 (PA10 | ALT1)
+#define PA11_ALT1 (PA11 | ALT1)
+#define PA11_ALT2 (PA11 | ALT2)
+#define PA12_ALT1 (PA12 | ALT1)
+#define PA12_ALT2 (PA12 | ALT2)
+#define PA13_ALT1 (PA13 | ALT1)
+#define PA15_ALT1 (PA15 | ALT1)
+#define PB0_ALT1 (PB0 | ALT1)
+#define PB0_ALT2 (PB0 | ALT2)
+#define PB1_ALT1 (PB1 | ALT1)
+#define PB1_ALT2 (PB1 | ALT2)
+#define PB2_ALT1 (PB2 | ALT1)
+#define PB3_ALT1 (PB3 | ALT1)
+#define PB4_ALT1 (PB4 | ALT1)
+#define PB4_ALT2 (PB4 | ALT2)
+#define PB5_ALT1 (PB5 | ALT1)
+#define PB5_ALT2 (PB5 | ALT2)
+#define PB6_ALT1 (PB6 | ALT1)
+#define PB6_ALT2 (PB6 | ALT2)
+#define PB7_ALT1 (PB7 | ALT1)
+#define PB7_ALT2 (PB7 | ALT2)
+#define PB8_ALT1 (PB8 | ALT1)
+#define PB8_ALT2 (PB8 | ALT2)
+#define PB9_ALT1 (PB9 | ALT1)
+#define PB9_ALT2 (PB9 | ALT2)
+#define PB9_ALT3 (PB9 | ALT3)
+#define PB11_ALT1 (PB11 | ALT1)
+#define PB12_ALT1 (PB12 | ALT1)
+#define PB13_ALT1 (PB13 | ALT1)
+#define PB14_ALT1 (PB14 | ALT1)
+#define PB15_ALT1 (PB15 | ALT1)
+#define PB15_ALT2 (PB15 | ALT2)
+#define PC6_ALT1 (PC6 | ALT1)
+#define PC10_ALT1 (PC10 | ALT1)
+#define PC11_ALT1 (PC11 | ALT1)
+#define PC13_ALT1 (PC13 | ALT1)
+
+#define NUM_DIGITAL_PINS 42
+#define NUM_ANALOG_INPUTS 21
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+ #define LED_BUILTIN PC6
+#endif
+
+// On-board user button
+#ifndef USER_BTN
+ #define USER_BTN PC13
+#endif
+
+// SPI definitions
+#ifndef PIN_SPI_SS
+ #define PIN_SPI_SS PA4
+#endif
+#ifndef PIN_SPI_SS1
+ #define PIN_SPI_SS1 PA15
+#endif
+#ifndef PIN_SPI_SS2
+ #define PIN_SPI_SS2 PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_SS3
+ #define PIN_SPI_SS3 PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_MOSI
+ #define PIN_SPI_MOSI PA7
+#endif
+#ifndef PIN_SPI_MISO
+ #define PIN_SPI_MISO PA6
+#endif
+#ifndef PIN_SPI_SCK
+ #define PIN_SPI_SCK PA5
+#endif
+
+// I2C definitions
+#ifndef PIN_WIRE_SDA
+ #define PIN_WIRE_SDA PA8
+#endif
+#ifndef PIN_WIRE_SCL
+ #define PIN_WIRE_SCL PA9
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+ #define TIMER_TONE TIM6
+#endif
+#ifndef TIMER_SERVO
+ #define TIMER_SERVO TIM7
+#endif
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+ #define SERIAL_UART_INSTANCE 2
+#endif
+
+// Default pin used for generic 'Serial' instance
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+ #define PIN_SERIAL_RX PA3
+#endif
+#ifndef PIN_SERIAL_TX
+ #define PIN_SERIAL_TX PA2
+#endif
+
+// Extra HAL modules
+#if !defined(HAL_DAC_MODULE_DISABLED)
+ #define HAL_DAC_MODULE_ENABLED
+#endif
+#if !defined(HAL_QSPI_MODULE_DISABLED)
+ #define HAL_QSPI_MODULE_ENABLED
+#endif
+
+/*----------------------------------------------------------------------------
+ * Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+ // These serial port names are intended to allow libraries and architecture-neutral
+ // sketches to automatically default to the correct port name for a particular type
+ // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+ // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+ //
+ // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
+ //
+ // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
+ //
+ // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
+ //
+ // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
+ //
+ // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
+ // pins are NOT connected to anything by default.
+ #ifndef SERIAL_PORT_MONITOR
+ #define SERIAL_PORT_MONITOR Serial2
+ #endif
+ #ifndef SERIAL_PORT_HARDWARE
+ #define SERIAL_PORT_HARDWARE Serial2
+ #endif
+#endif