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Copy pathsljitNativeARM_T2_32.c
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sljitNativeARM_T2_32.c
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/*
* Stack-less Just-In-Time compiler
*
* Copyright Zoltan Herczeg ([email protected]). All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification, are
* permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER(S) AND CONTRIBUTORS ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE COPYRIGHT HOLDER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
SLJIT_API_FUNC_ATTRIBUTE const char* sljit_get_platform_name(void)
{
#ifdef __SOFTFP__
return "ARM-Thumb2" SLJIT_CPUINFO " ABI:softfp";
#else
return "ARM-Thumb2" SLJIT_CPUINFO " ABI:hardfp";
#endif
}
/* Length of an instruction word. */
typedef sljit_u32 sljit_ins;
/* Last register + 1. */
#define TMP_REG1 (SLJIT_NUMBER_OF_REGISTERS + 2)
#define TMP_REG2 (SLJIT_NUMBER_OF_REGISTERS + 3)
#define TMP_PC (SLJIT_NUMBER_OF_REGISTERS + 4)
#define TMP_FREG1 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 1)
#define TMP_FREG2 (SLJIT_NUMBER_OF_FLOAT_REGISTERS + 2)
/* See sljit_emit_enter and sljit_emit_op0 if you want to change them. */
static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = {
0, 0, 1, 2, 3, 11, 10, 9, 8, 7, 6, 5, 4, 13, 12, 14, 15
};
static const sljit_u8 freg_map[((SLJIT_NUMBER_OF_FLOAT_REGISTERS + 2) << 1) + 1] = {
0,
0, 1, 2, 3, 4, 5, 15, 14, 13, 12, 11, 10, 9, 8,
7, 6,
0, 1, 2, 3, 4, 5, 15, 14, 13, 12, 11, 10, 9, 8,
7, 6
};
static const sljit_u8 freg_ebit_map[((SLJIT_NUMBER_OF_FLOAT_REGISTERS + 2) << 1) + 1] = {
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0,
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1, 1
};
#define COPY_BITS(src, from, to, bits) \
((from >= to ? ((sljit_ins)(src) >> (from - to)) : ((sljit_ins)(src) << (to - from))) & (((1 << bits) - 1) << to))
#define NEGATE(uimm) ((sljit_uw)-(sljit_sw)(uimm))
/* Thumb16 encodings. */
#define RD3(rd) ((sljit_ins)reg_map[rd])
#define RN3(rn) ((sljit_ins)reg_map[rn] << 3)
#define RM3(rm) ((sljit_ins)reg_map[rm] << 6)
#define RDN3(rdn) ((sljit_ins)reg_map[rdn] << 8)
#define IMM3(imm) ((sljit_ins)imm << 6)
#define IMM8(imm) ((sljit_ins)imm)
/* Thumb16 helpers. */
#define SET_REGS44(rd, rn) \
(((sljit_ins)reg_map[rn] << 3) | ((sljit_ins)reg_map[rd] & 0x7) | (((sljit_ins)reg_map[rd] & 0x8) << 4))
#define IS_2_LO_REGS(reg1, reg2) \
(reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
#define IS_3_LO_REGS(reg1, reg2, reg3) \
(reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
/* Thumb32 encodings. */
#define RM4(rm) ((sljit_ins)reg_map[rm])
#define RD4(rd) ((sljit_ins)reg_map[rd] << 8)
#define RT4(rt) ((sljit_ins)reg_map[rt] << 12)
#define RN4(rn) ((sljit_ins)reg_map[rn] << 16)
#define VM4(vm) (((sljit_ins)freg_map[vm]) | ((sljit_ins)freg_ebit_map[vm] << 5))
#define VD4(vd) (((sljit_ins)freg_map[vd] << 12) | ((sljit_ins)freg_ebit_map[vd] << 22))
#define VN4(vn) (((sljit_ins)freg_map[vn] << 16) | ((sljit_ins)freg_ebit_map[vn] << 7))
#define IMM5(imm) \
(COPY_BITS(imm, 2, 12, 3) | (((sljit_ins)imm & 0x3) << 6))
#define IMM12(imm) \
(COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | ((sljit_ins)imm & 0xff))
/* --------------------------------------------------------------------- */
/* Instrucion forms */
/* --------------------------------------------------------------------- */
/* dot '.' changed to _
I immediate form (possibly followed by number of immediate bits). */
#define ADCI 0xf1400000
#define ADCS 0x4140
#define ADC_W 0xeb400000
#define ADD 0x4400
#define ADDS 0x1800
#define ADDSI3 0x1c00
#define ADDSI8 0x3000
#define ADDWI 0xf2000000
#define ADD_SP 0x4485
#define ADD_SP_I 0xb000
#define ADD_W 0xeb000000
#define ADD_WI 0xf1000000
#define ANDI 0xf0000000
#define ANDS 0x4000
#define AND_W 0xea000000
#define ASRS 0x4100
#define ASRSI 0x1000
#define ASR_W 0xfa40f000
#define ASR_WI 0xea4f0020
#define BCC 0xd000
#define BICI 0xf0200000
#define BKPT 0xbe00
#define BLX 0x4780
#define BX 0x4700
#define CLZ 0xfab0f080
#define CMNI_W 0xf1100f00
#define CMP 0x4280
#define CMPI 0x2800
#define CMPI_W 0xf1b00f00
#define CMP_X 0x4500
#define CMP_W 0xebb00f00
#define EORI 0xf0800000
#define EORS 0x4040
#define EOR_W 0xea800000
#define IT 0xbf00
#define LDR 0xf8d00000
#define LDR_SP 0x9800
#define LDRD 0xe9500000
#define LDREX 0xe8500f00
#define LDREXB 0xe8d00f4f
#define LDREXH 0xe8d00f5f
#define LDRI 0xf8500800
#define LSLS 0x4080
#define LSLSI 0x0000
#define LSL_W 0xfa00f000
#define LSL_WI 0xea4f0000
#define LSRS 0x40c0
#define LSRSI 0x0800
#define LSR_W 0xfa20f000
#define LSR_WI 0xea4f0010
#define MOV 0x4600
#define MOVS 0x0000
#define MOVSI 0x2000
#define MOVT 0xf2c00000
#define MOVW 0xf2400000
#define MOV_W 0xea4f0000
#define MOV_WI 0xf04f0000
#define MUL 0xfb00f000
#define MVNS 0x43c0
#define MVN_W 0xea6f0000
#define MVN_WI 0xf06f0000
#define NOP 0xbf00
#define ORNI 0xf0600000
#define ORRI 0xf0400000
#define ORRS 0x4300
#define ORR_W 0xea400000
#define POP 0xbc00
#define POP_W 0xe8bd0000
#define PUSH 0xb400
#define PUSH_W 0xe92d0000
#define REV 0xba00
#define REV_W 0xfa90f080
#define REV16 0xba40
#define REV16_W 0xfa90f090
#define RBIT 0xfa90f0a0
#define RORS 0x41c0
#define ROR_W 0xfa60f000
#define ROR_WI 0xea4f0030
#define RSB_WI 0xf1c00000
#define RSBSI 0x4240
#define SBCI 0xf1600000
#define SBCS 0x4180
#define SBC_W 0xeb600000
#define SDIV 0xfb90f0f0
#define SMULL 0xfb800000
#define STR_SP 0x9000
#define STRD 0xe9400000
#define STREX 0xe8400000
#define STREXB 0xe8c00f40
#define STREXH 0xe8c00f50
#define SUBS 0x1a00
#define SUBSI3 0x1e00
#define SUBSI8 0x3800
#define SUB_W 0xeba00000
#define SUBWI 0xf2a00000
#define SUB_SP_I 0xb080
#define SUB_WI 0xf1a00000
#define SXTB 0xb240
#define SXTB_W 0xfa4ff080
#define SXTH 0xb200
#define SXTH_W 0xfa0ff080
#define TST 0x4200
#define TSTI 0xf0000f00
#define TST_W 0xea000f00
#define UDIV 0xfbb0f0f0
#define UMULL 0xfba00000
#define UXTB 0xb2c0
#define UXTB_W 0xfa5ff080
#define UXTH 0xb280
#define UXTH_W 0xfa1ff080
#define VABS_F32 0xeeb00ac0
#define VADD_F32 0xee300a00
#define VAND 0xef000110
#define VCMP_F32 0xeeb40a40
#define VCVT_F32_S32 0xeeb80ac0
#define VCVT_F32_U32 0xeeb80a40
#define VCVT_F64_F32 0xeeb70ac0
#define VCVT_S32_F32 0xeebd0ac0
#define VDIV_F32 0xee800a00
#define VDUP 0xee800b10
#define VDUP_s 0xffb00c00
#define VEOR 0xff000110
#define VLD1 0xf9200000
#define VLD1_r 0xf9a00c00
#define VLD1_s 0xf9a00000
#define VLDR_F32 0xed100a00
#define VMOV_F32 0xeeb00a40
#define VMOV 0xee000a10
#define VMOV2 0xec400a10
#define VMOV_i 0xef800010
#define VMOV_s 0xee000b10
#define VMOVN 0xffb20200
#define VMRS 0xeef1fa10
#define VMUL_F32 0xee200a00
#define VNEG_F32 0xeeb10a40
#define VORR 0xef200110
#define VPOP 0xecbd0b00
#define VPUSH 0xed2d0b00
#define VSHLL 0xef800a10
#define VSHR 0xef800010
#define VSRA 0xef800110
#define VST1 0xf9000000
#define VST1_s 0xf9800000
#define VSTR_F32 0xed000a00
#define VSUB_F32 0xee300a40
#if (defined SLJIT_ARGUMENT_CHECKS && SLJIT_ARGUMENT_CHECKS)
static sljit_s32 function_check_is_freg(struct sljit_compiler *compiler, sljit_s32 fr, sljit_s32 is_32)
{
if (compiler->scratches == -1)
return 0;
if (is_32 && fr >= SLJIT_F64_SECOND(SLJIT_FR0))
fr -= SLJIT_F64_SECOND(0);
return (fr >= SLJIT_FR0 && fr < (SLJIT_FR0 + compiler->fscratches))
|| (fr > (SLJIT_FS0 - compiler->fsaveds) && fr <= SLJIT_FS0)
|| (fr >= SLJIT_TMP_FREGISTER_BASE && fr < (SLJIT_TMP_FREGISTER_BASE + SLJIT_NUMBER_OF_TEMPORARY_FLOAT_REGISTERS));
}
#endif /* SLJIT_ARGUMENT_CHECKS */
static sljit_s32 push_inst16(struct sljit_compiler *compiler, sljit_ins inst)
{
sljit_u16 *ptr;
SLJIT_ASSERT(!(inst & 0xffff0000));
ptr = (sljit_u16*)ensure_buf(compiler, sizeof(sljit_u16));
FAIL_IF(!ptr);
*ptr = (sljit_u16)(inst);
compiler->size++;
return SLJIT_SUCCESS;
}
static sljit_s32 push_inst32(struct sljit_compiler *compiler, sljit_ins inst)
{
sljit_u16 *ptr = (sljit_u16*)ensure_buf(compiler, sizeof(sljit_ins));
FAIL_IF(!ptr);
*ptr++ = (sljit_u16)(inst >> 16);
*ptr = (sljit_u16)(inst);
compiler->size += 2;
return SLJIT_SUCCESS;
}
static SLJIT_INLINE sljit_s32 emit_imm32_const(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
{
FAIL_IF(push_inst32(compiler, MOVW | RD4(dst)
| COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
return push_inst32(compiler, MOVT | RD4(dst)
| COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
}
static SLJIT_INLINE void modify_imm32_const(sljit_u16 *inst, sljit_uw new_imm)
{
sljit_ins dst = inst[1] & 0x0f00;
SLJIT_ASSERT(((inst[0] & 0xfbf0) == (MOVW >> 16)) && ((inst[2] & 0xfbf0) == (MOVT >> 16)) && dst == (inst[3] & 0x0f00));
inst[0] = (sljit_u16)((MOVW >> 16) | COPY_BITS(new_imm, 12, 0, 4) | COPY_BITS(new_imm, 11, 10, 1));
inst[1] = (sljit_u16)(dst | COPY_BITS(new_imm, 8, 12, 3) | (new_imm & 0xff));
inst[2] = (sljit_u16)((MOVT >> 16) | COPY_BITS(new_imm, 12 + 16, 0, 4) | COPY_BITS(new_imm, 11 + 16, 10, 1));
inst[3] = (sljit_u16)(dst | COPY_BITS(new_imm, 8 + 16, 12, 3) | ((new_imm & 0xff0000) >> 16));
}
static SLJIT_INLINE sljit_s32 detect_jump_type(struct sljit_jump *jump, sljit_u16 *code_ptr, sljit_u16 *code, sljit_sw executable_offset)
{
sljit_sw diff;
if (jump->flags & SLJIT_REWRITABLE_JUMP)
return 0;
if (jump->flags & JUMP_ADDR) {
/* Branch to ARM code is not optimized yet. */
if (!(jump->u.target & 0x1))
return 0;
diff = ((sljit_sw)jump->u.target - (sljit_sw)(code_ptr + 2) - executable_offset) >> 1;
}
else {
SLJIT_ASSERT(jump->flags & JUMP_LABEL);
diff = ((sljit_sw)(code + jump->u.label->size) - (sljit_sw)(code_ptr + 2)) >> 1;
}
if (jump->flags & IS_COND) {
SLJIT_ASSERT(!(jump->flags & IS_BL));
if (diff <= 127 && diff >= -128) {
jump->flags |= PATCH_TYPE1;
return 5;
}
if (diff <= 524287 && diff >= -524288) {
jump->flags |= PATCH_TYPE2;
return 4;
}
/* +1 comes from the prefix IT instruction. */
diff--;
if (diff <= 8388607 && diff >= -8388608) {
jump->flags |= PATCH_TYPE3;
return 3;
}
}
else if (jump->flags & IS_BL) {
if (diff <= 8388607 && diff >= -8388608) {
jump->flags |= PATCH_BL;
return 3;
}
}
else {
if (diff <= 1023 && diff >= -1024) {
jump->flags |= PATCH_TYPE4;
return 4;
}
if (diff <= 8388607 && diff >= -8388608) {
jump->flags |= PATCH_TYPE5;
return 3;
}
}
return 0;
}
static SLJIT_INLINE void set_jump_instruction(struct sljit_jump *jump, sljit_sw executable_offset)
{
sljit_s32 type = (jump->flags >> 4) & 0xf;
sljit_sw diff;
sljit_u16 *jump_inst;
sljit_s32 s, j1, j2;
if (SLJIT_UNLIKELY(type == 0)) {
modify_imm32_const((sljit_u16*)jump->addr, (jump->flags & JUMP_LABEL) ? jump->u.label->addr : jump->u.target);
return;
}
if (jump->flags & JUMP_ADDR) {
SLJIT_ASSERT(jump->u.target & 0x1);
diff = ((sljit_sw)jump->u.target - (sljit_sw)(jump->addr + sizeof(sljit_u32)) - executable_offset) >> 1;
}
else {
SLJIT_ASSERT(jump->u.label->addr & 0x1);
diff = ((sljit_sw)(jump->u.label->addr) - (sljit_sw)(jump->addr + sizeof(sljit_u32)) - executable_offset) >> 1;
}
jump_inst = (sljit_u16*)jump->addr;
switch (type) {
case 1:
/* Encoding T1 of 'B' instruction */
SLJIT_ASSERT(diff <= 127 && diff >= -128 && (jump->flags & IS_COND));
jump_inst[0] = (sljit_u16)(0xd000 | (jump->flags & 0xf00) | ((sljit_ins)diff & 0xff));
return;
case 2:
/* Encoding T3 of 'B' instruction */
SLJIT_ASSERT(diff <= 524287 && diff >= -524288 && (jump->flags & IS_COND));
jump_inst[0] = (sljit_u16)(0xf000 | COPY_BITS(jump->flags, 8, 6, 4) | COPY_BITS(diff, 11, 0, 6) | COPY_BITS(diff, 19, 10, 1));
jump_inst[1] = (sljit_u16)(0x8000 | COPY_BITS(diff, 17, 13, 1) | COPY_BITS(diff, 18, 11, 1) | ((sljit_ins)diff & 0x7ff));
return;
case 3:
SLJIT_ASSERT(jump->flags & IS_COND);
*jump_inst++ = (sljit_u16)(IT | ((jump->flags >> 4) & 0xf0) | 0x8);
diff--;
type = 5;
break;
case 4:
/* Encoding T2 of 'B' instruction */
SLJIT_ASSERT(diff <= 1023 && diff >= -1024 && !(jump->flags & IS_COND));
jump_inst[0] = (sljit_u16)(0xe000 | (diff & 0x7ff));
return;
}
SLJIT_ASSERT(diff <= 8388607 && diff >= -8388608);
/* Really complex instruction form for branches. */
s = (diff >> 23) & 0x1;
j1 = (~(diff >> 22) ^ s) & 0x1;
j2 = (~(diff >> 21) ^ s) & 0x1;
jump_inst[0] = (sljit_u16)(0xf000 | ((sljit_ins)s << 10) | COPY_BITS(diff, 11, 0, 10));
jump_inst[1] = (sljit_u16)((j1 << 13) | (j2 << 11) | (diff & 0x7ff));
/* The others have a common form. */
if (type == 5) /* Encoding T4 of 'B' instruction */
jump_inst[1] |= 0x9000;
else if (type == 6) /* Encoding T1 of 'BL' instruction */
jump_inst[1] |= 0xd000;
else
SLJIT_UNREACHABLE();
}
SLJIT_API_FUNC_ATTRIBUTE void* sljit_generate_code(struct sljit_compiler *compiler)
{
struct sljit_memory_fragment *buf;
sljit_u16 *code;
sljit_u16 *code_ptr;
sljit_u16 *buf_ptr;
sljit_u16 *buf_end;
sljit_uw half_count;
sljit_uw next_addr;
sljit_sw executable_offset;
struct sljit_label *label;
struct sljit_jump *jump;
struct sljit_const *const_;
struct sljit_put_label *put_label;
CHECK_ERROR_PTR();
CHECK_PTR(check_sljit_generate_code(compiler));
reverse_buf(compiler);
code = (sljit_u16*)SLJIT_MALLOC_EXEC(compiler->size * sizeof(sljit_u16), compiler->exec_allocator_data);
PTR_FAIL_WITH_EXEC_IF(code);
buf = compiler->buf;
code_ptr = code;
half_count = 0;
next_addr = 0;
executable_offset = SLJIT_EXEC_OFFSET(code);
label = compiler->labels;
jump = compiler->jumps;
const_ = compiler->consts;
put_label = compiler->put_labels;
do {
buf_ptr = (sljit_u16*)buf->memory;
buf_end = buf_ptr + (buf->used_size >> 1);
do {
*code_ptr = *buf_ptr++;
if (next_addr == half_count) {
SLJIT_ASSERT(!label || label->size >= half_count);
SLJIT_ASSERT(!jump || jump->addr >= half_count);
SLJIT_ASSERT(!const_ || const_->addr >= half_count);
SLJIT_ASSERT(!put_label || put_label->addr >= half_count);
/* These structures are ordered by their address. */
if (label && label->size == half_count) {
label->addr = ((sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset)) | 0x1;
label->size = (sljit_uw)(code_ptr - code);
label = label->next;
}
if (jump && jump->addr == half_count) {
jump->addr = (sljit_uw)code_ptr - ((jump->flags & IS_COND) ? 10 : 8);
code_ptr -= detect_jump_type(jump, code_ptr, code, executable_offset);
jump = jump->next;
}
if (const_ && const_->addr == half_count) {
const_->addr = (sljit_uw)code_ptr;
const_ = const_->next;
}
if (put_label && put_label->addr == half_count) {
SLJIT_ASSERT(put_label->label);
put_label->addr = (sljit_uw)code_ptr;
put_label = put_label->next;
}
next_addr = compute_next_addr(label, jump, const_, put_label);
}
code_ptr++;
half_count++;
} while (buf_ptr < buf_end);
buf = buf->next;
} while (buf);
if (label && label->size == half_count) {
label->addr = ((sljit_uw)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset)) | 0x1;
label->size = (sljit_uw)(code_ptr - code);
label = label->next;
}
SLJIT_ASSERT(!label);
SLJIT_ASSERT(!jump);
SLJIT_ASSERT(!const_);
SLJIT_ASSERT(!put_label);
SLJIT_ASSERT(code_ptr - code <= (sljit_sw)compiler->size);
jump = compiler->jumps;
while (jump) {
set_jump_instruction(jump, executable_offset);
jump = jump->next;
}
put_label = compiler->put_labels;
while (put_label) {
modify_imm32_const((sljit_u16 *)put_label->addr, put_label->label->addr);
put_label = put_label->next;
}
compiler->error = SLJIT_ERR_COMPILED;
compiler->executable_offset = executable_offset;
compiler->executable_size = (sljit_uw)(code_ptr - code) * sizeof(sljit_u16);
code = (sljit_u16 *)SLJIT_ADD_EXEC_OFFSET(code, executable_offset);
code_ptr = (sljit_u16 *)SLJIT_ADD_EXEC_OFFSET(code_ptr, executable_offset);
SLJIT_CACHE_FLUSH(code, code_ptr);
SLJIT_UPDATE_WX_FLAGS(code, code_ptr, 1);
/* Set thumb mode flag. */
return (void*)((sljit_uw)code | 0x1);
}
SLJIT_API_FUNC_ATTRIBUTE sljit_s32 sljit_has_cpu_feature(sljit_s32 feature_type)
{
switch (feature_type) {
case SLJIT_HAS_FPU:
case SLJIT_HAS_F64_AS_F32_PAIR:
case SLJIT_HAS_SIMD:
#ifdef SLJIT_IS_FPU_AVAILABLE
return (SLJIT_IS_FPU_AVAILABLE) != 0;
#else
/* Available by default. */
return 1;
#endif
case SLJIT_SIMD_REGS_ARE_PAIRS:
case SLJIT_HAS_CLZ:
case SLJIT_HAS_CTZ:
case SLJIT_HAS_REV:
case SLJIT_HAS_ROT:
case SLJIT_HAS_CMOV:
case SLJIT_HAS_PREFETCH:
case SLJIT_HAS_COPY_F32:
case SLJIT_HAS_COPY_F64:
case SLJIT_HAS_ATOMIC:
return 1;
default:
return 0;
}
}
/* --------------------------------------------------------------------- */
/* Core code generator functions. */
/* --------------------------------------------------------------------- */
#define INVALID_IMM 0x80000000
static sljit_uw get_imm(sljit_uw imm)
{
/* Thumb immediate form. */
sljit_s32 counter;
if (imm <= 0xff)
return imm;
if ((imm & 0xffff) == (imm >> 16)) {
/* Some special cases. */
if (!(imm & 0xff00))
return (1 << 12) | (imm & 0xff);
if (!(imm & 0xff))
return (2 << 12) | ((imm >> 8) & 0xff);
if ((imm & 0xff00) == ((imm & 0xff) << 8))
return (3 << 12) | (imm & 0xff);
}
/* Assembly optimization: count leading zeroes? */
counter = 8;
if (!(imm & 0xffff0000)) {
counter += 16;
imm <<= 16;
}
if (!(imm & 0xff000000)) {
counter += 8;
imm <<= 8;
}
if (!(imm & 0xf0000000)) {
counter += 4;
imm <<= 4;
}
if (!(imm & 0xc0000000)) {
counter += 2;
imm <<= 2;
}
if (!(imm & 0x80000000)) {
counter += 1;
imm <<= 1;
}
/* Since imm >= 128, this must be true. */
SLJIT_ASSERT(counter <= 31);
if (imm & 0x00ffffff)
return INVALID_IMM; /* Cannot be encoded. */
return ((imm >> 24) & 0x7f) | COPY_BITS(counter, 4, 26, 1) | COPY_BITS(counter, 1, 12, 3) | COPY_BITS(counter, 0, 7, 1);
}
static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 dst, sljit_uw imm)
{
sljit_uw tmp;
/* MOVS cannot be used since it destroy flags. */
if (imm >= 0x10000) {
tmp = get_imm(imm);
if (tmp != INVALID_IMM)
return push_inst32(compiler, MOV_WI | RD4(dst) | tmp);
tmp = get_imm(~imm);
if (tmp != INVALID_IMM)
return push_inst32(compiler, MVN_WI | RD4(dst) | tmp);
}
/* set low 16 bits, set hi 16 bits to 0. */
FAIL_IF(push_inst32(compiler, MOVW | RD4(dst)
| COPY_BITS(imm, 12, 16, 4) | COPY_BITS(imm, 11, 26, 1) | COPY_BITS(imm, 8, 12, 3) | (imm & 0xff)));
/* set hi 16 bit if needed. */
if (imm >= 0x10000)
return push_inst32(compiler, MOVT | RD4(dst)
| COPY_BITS(imm, 12 + 16, 16, 4) | COPY_BITS(imm, 11 + 16, 26, 1) | COPY_BITS(imm, 8 + 16, 12, 3) | ((imm & 0xff0000) >> 16));
return SLJIT_SUCCESS;
}
#define ARG1_IMM 0x0010000
#define ARG2_IMM 0x0020000
/* SET_FLAGS must be 0x100000 as it is also the value of S bit (can be used for optimization). */
#define SET_FLAGS 0x0100000
#define UNUSED_RETURN 0x0200000
static sljit_s32 emit_op_imm(struct sljit_compiler *compiler, sljit_s32 flags, sljit_s32 dst, sljit_uw arg1, sljit_uw arg2)
{
/* dst must be register, TMP_REG1
arg1 must be register, imm
arg2 must be register, imm */
sljit_s32 reg;
sljit_uw imm, imm2;
if (SLJIT_UNLIKELY((flags & (ARG1_IMM | ARG2_IMM)) == (ARG1_IMM | ARG2_IMM))) {
/* Both are immediates, no temporaries are used. */
flags &= ~ARG1_IMM;
FAIL_IF(load_immediate(compiler, TMP_REG1, arg1));
arg1 = TMP_REG1;
}
if (flags & (ARG1_IMM | ARG2_IMM)) {
reg = (sljit_s32)((flags & ARG2_IMM) ? arg1 : arg2);
imm = (flags & ARG2_IMM) ? arg2 : arg1;
switch (flags & 0xffff) {
case SLJIT_CLZ:
case SLJIT_CTZ:
case SLJIT_REV:
case SLJIT_REV_U16:
case SLJIT_REV_S16:
case SLJIT_REV_U32:
case SLJIT_REV_S32:
case SLJIT_MUL:
/* No form with immediate operand. */
break;
case SLJIT_MOV:
SLJIT_ASSERT(!(flags & SET_FLAGS) && (flags & ARG2_IMM) && arg1 == TMP_REG2);
return load_immediate(compiler, dst, imm);
case SLJIT_ADD:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_ADD;
imm2 = NEGATE(imm);
if (IS_2_LO_REGS(reg, dst)) {
if (imm <= 0x7)
return push_inst16(compiler, ADDSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
if (imm2 <= 0x7)
return push_inst16(compiler, SUBSI3 | IMM3(imm2) | RD3(dst) | RN3(reg));
if (reg == dst) {
if (imm <= 0xff)
return push_inst16(compiler, ADDSI8 | IMM8(imm) | RDN3(dst));
if (imm2 <= 0xff)
return push_inst16(compiler, SUBSI8 | IMM8(imm2) | RDN3(dst));
}
}
if (!(flags & SET_FLAGS)) {
if (imm <= 0xfff)
return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(imm));
if (imm2 <= 0xfff)
return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(imm2));
}
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, ADD_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm2);
imm = get_imm(NEGATE(imm));
if (imm != INVALID_IMM)
return push_inst32(compiler, SUB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
case SLJIT_ADDC:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_ADD;
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, ADCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm2);
if (flags & ARG2_IMM) {
imm = get_imm(~imm);
if (imm != INVALID_IMM)
return push_inst32(compiler, SBCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
}
break;
case SLJIT_SUB:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_SUB;
if (flags & ARG1_IMM) {
if (imm == 0 && IS_2_LO_REGS(reg, dst))
return push_inst16(compiler, RSBSI | RD3(dst) | RN3(reg));
imm = get_imm(imm);
if (imm != INVALID_IMM)
return push_inst32(compiler, RSB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
}
if (flags & UNUSED_RETURN) {
if (imm <= 0xff && reg_map[reg] <= 7)
return push_inst16(compiler, CMPI | IMM8(imm) | RDN3(reg));
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, CMPI_W | RN4(reg) | imm2);
imm = get_imm(NEGATE(imm));
if (imm != INVALID_IMM)
return push_inst32(compiler, CMNI_W | RN4(reg) | imm);
break;
}
imm2 = NEGATE(imm);
if (IS_2_LO_REGS(reg, dst)) {
if (imm <= 0x7)
return push_inst16(compiler, SUBSI3 | IMM3(imm) | RD3(dst) | RN3(reg));
if (imm2 <= 0x7)
return push_inst16(compiler, ADDSI3 | IMM3(imm2) | RD3(dst) | RN3(reg));
if (reg == dst) {
if (imm <= 0xff)
return push_inst16(compiler, SUBSI8 | IMM8(imm) | RDN3(dst));
if (imm2 <= 0xff)
return push_inst16(compiler, ADDSI8 | IMM8(imm2) | RDN3(dst));
}
}
if (!(flags & SET_FLAGS)) {
if (imm <= 0xfff)
return push_inst32(compiler, SUBWI | RD4(dst) | RN4(reg) | IMM12(imm));
if (imm2 <= 0xfff)
return push_inst32(compiler, ADDWI | RD4(dst) | RN4(reg) | IMM12(imm2));
}
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, SUB_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm2);
imm = get_imm(NEGATE(imm));
if (imm != INVALID_IMM)
return push_inst32(compiler, ADD_WI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
case SLJIT_SUBC:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_SUB;
if (flags & ARG1_IMM)
break;
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, SBCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm2);
imm = get_imm(~imm);
if (imm != INVALID_IMM)
return push_inst32(compiler, ADCI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
case SLJIT_AND:
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, ((flags & UNUSED_RETURN) ? TSTI : ANDI) | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm2);
imm = get_imm(~imm);
if (imm != INVALID_IMM)
return push_inst32(compiler, BICI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
case SLJIT_OR:
imm2 = get_imm(imm);
if (imm2 != INVALID_IMM)
return push_inst32(compiler, ORRI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm2);
imm = get_imm(~imm);
if (imm != INVALID_IMM)
return push_inst32(compiler, ORNI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
case SLJIT_XOR:
if (imm == (sljit_uw)-1) {
if (IS_2_LO_REGS(dst, reg))
return push_inst16(compiler, MVNS | RD3(dst) | RN3(reg));
return push_inst32(compiler, MVN_W | (flags & SET_FLAGS) | RD4(dst) | RM4(reg));
}
imm = get_imm(imm);
if (imm != INVALID_IMM)
return push_inst32(compiler, EORI | (flags & SET_FLAGS) | RD4(dst) | RN4(reg) | imm);
break;
case SLJIT_SHL:
case SLJIT_MSHL:
case SLJIT_LSHR:
case SLJIT_MLSHR:
case SLJIT_ASHR:
case SLJIT_MASHR:
case SLJIT_ROTL:
case SLJIT_ROTR:
if (flags & ARG1_IMM)
break;
imm &= 0x1f;
if (imm == 0) {
if (!(flags & SET_FLAGS))
return push_inst16(compiler, MOV | SET_REGS44(dst, reg));
if (IS_2_LO_REGS(dst, reg))
return push_inst16(compiler, MOVS | RD3(dst) | RN3(reg));
return push_inst32(compiler, MOV_W | SET_FLAGS | RD4(dst) | RM4(reg));
}
switch (flags & 0xffff) {
case SLJIT_SHL:
case SLJIT_MSHL:
if (IS_2_LO_REGS(dst, reg))
return push_inst16(compiler, LSLSI | RD3(dst) | RN3(reg) | (imm << 6));
return push_inst32(compiler, LSL_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
case SLJIT_LSHR:
case SLJIT_MLSHR:
if (IS_2_LO_REGS(dst, reg))
return push_inst16(compiler, LSRSI | RD3(dst) | RN3(reg) | (imm << 6));
return push_inst32(compiler, LSR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
case SLJIT_ASHR:
case SLJIT_MASHR:
if (IS_2_LO_REGS(dst, reg))
return push_inst16(compiler, ASRSI | RD3(dst) | RN3(reg) | (imm << 6));
return push_inst32(compiler, ASR_WI | (flags & SET_FLAGS) | RD4(dst) | RM4(reg) | IMM5(imm));
case SLJIT_ROTL:
imm = (imm ^ 0x1f) + 1;
/* fallthrough */
default: /* SLJIT_ROTR */
return push_inst32(compiler, ROR_WI | RD4(dst) | RM4(reg) | IMM5(imm));
}
default:
SLJIT_UNREACHABLE();
break;
}
if (flags & ARG2_IMM) {
imm = arg2;
arg2 = (arg1 == TMP_REG1) ? TMP_REG2 : TMP_REG1;
FAIL_IF(load_immediate(compiler, (sljit_s32)arg2, imm));
} else {
imm = arg1;
arg1 = (arg2 == TMP_REG1) ? TMP_REG2 : TMP_REG1;
FAIL_IF(load_immediate(compiler, (sljit_s32)arg1, imm));
}
SLJIT_ASSERT(arg1 != arg2);
}
/* Both arguments are registers. */
switch (flags & 0xffff) {
case SLJIT_MOV:
case SLJIT_MOV_U32:
case SLJIT_MOV_S32:
case SLJIT_MOV32:
case SLJIT_MOV_P:
SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
if (dst == (sljit_s32)arg2)
return SLJIT_SUCCESS;
return push_inst16(compiler, MOV | SET_REGS44(dst, arg2));
case SLJIT_MOV_U8:
SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
if (IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2));
return push_inst32(compiler, UXTB_W | RD4(dst) | RM4(arg2));
case SLJIT_MOV_S8:
SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
if (IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, SXTB | RD3(dst) | RN3(arg2));
return push_inst32(compiler, SXTB_W | RD4(dst) | RM4(arg2));
case SLJIT_MOV_U16:
SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
if (IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, UXTH | RD3(dst) | RN3(arg2));
return push_inst32(compiler, UXTH_W | RD4(dst) | RM4(arg2));
case SLJIT_MOV_S16:
SLJIT_ASSERT(!(flags & SET_FLAGS) && arg1 == TMP_REG2);
if (IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, SXTH | RD3(dst) | RN3(arg2));
return push_inst32(compiler, SXTH_W | RD4(dst) | RM4(arg2));
case SLJIT_CLZ:
SLJIT_ASSERT(arg1 == TMP_REG2);
return push_inst32(compiler, CLZ | RN4(arg2) | RD4(dst) | RM4(arg2));
case SLJIT_CTZ:
SLJIT_ASSERT(arg1 == TMP_REG2);
FAIL_IF(push_inst32(compiler, RBIT | RN4(arg2) | RD4(dst) | RM4(arg2)));
return push_inst32(compiler, CLZ | RN4(dst) | RD4(dst) | RM4(dst));
case SLJIT_REV:
case SLJIT_REV_U32:
case SLJIT_REV_S32:
SLJIT_ASSERT(arg1 == TMP_REG2);
if (IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, REV | RD3(dst) | RN3(arg2));
return push_inst32(compiler, REV_W | RN4(arg2) | RD4(dst) | RM4(arg2));
case SLJIT_REV_U16:
case SLJIT_REV_S16:
SLJIT_ASSERT(arg1 == TMP_REG2 && dst != TMP_REG2);
flags &= 0xffff;
if (IS_2_LO_REGS(dst, arg2))
FAIL_IF(push_inst16(compiler, REV16 | RD3(dst) | RN3(arg2)));
else
FAIL_IF(push_inst32(compiler, REV16_W | RN4(arg2) | RD4(dst) | RM4(arg2)));
if (dst == TMP_REG1 || (arg2 == TMP_REG1 && flags == SLJIT_REV_U16))
return SLJIT_SUCCESS;
if (reg_map[dst] <= 7)
return push_inst16(compiler, (flags == SLJIT_REV_U16 ? UXTH : SXTH) | RD3(dst) | RN3(dst));
return push_inst32(compiler, (flags == SLJIT_REV_U16 ? UXTH_W : SXTH_W) | RD4(dst) | RM4(dst));
case SLJIT_ADD:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_ADD;
if (IS_3_LO_REGS(dst, arg1, arg2))
return push_inst16(compiler, ADDS | RD3(dst) | RN3(arg1) | RM3(arg2));
if (dst == (sljit_s32)arg1 && !(flags & SET_FLAGS))
return push_inst16(compiler, ADD | SET_REGS44(dst, arg2));
return push_inst32(compiler, ADD_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_ADDC:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_ADD;
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, ADCS | RD3(dst) | RN3(arg2));
return push_inst32(compiler, ADC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_SUB:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_SUB;
if (flags & UNUSED_RETURN) {
if (IS_2_LO_REGS(arg1, arg2))
return push_inst16(compiler, CMP | RD3(arg1) | RN3(arg2));
return push_inst16(compiler, CMP_X | SET_REGS44(arg1, arg2));
}
if (IS_3_LO_REGS(dst, arg1, arg2))
return push_inst16(compiler, SUBS | RD3(dst) | RN3(arg1) | RM3(arg2));
return push_inst32(compiler, SUB_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_SUBC:
compiler->status_flags_state = SLJIT_CURRENT_FLAGS_SUB;
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, SBCS | RD3(dst) | RN3(arg2));
return push_inst32(compiler, SBC_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_MUL:
compiler->status_flags_state = 0;
if (!(flags & SET_FLAGS))
return push_inst32(compiler, MUL | RD4(dst) | RN4(arg1) | RM4(arg2));
SLJIT_ASSERT(dst != TMP_REG2);
FAIL_IF(push_inst32(compiler, SMULL | RT4(dst) | RD4(TMP_REG2) | RN4(arg1) | RM4(arg2)));
/* cmp TMP_REG2, dst asr #31. */
return push_inst32(compiler, CMP_W | RN4(TMP_REG2) | 0x70e0 | RM4(dst));
case SLJIT_AND:
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, ANDS | RD3(dst) | RN3(arg2));
if ((flags & UNUSED_RETURN) && IS_2_LO_REGS(arg1, arg2))
return push_inst16(compiler, TST | RD3(arg1) | RN3(arg2));
return push_inst32(compiler, ((flags & UNUSED_RETURN) ? TST_W : AND_W) | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_OR:
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, ORRS | RD3(dst) | RN3(arg2));
return push_inst32(compiler, ORR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_XOR:
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, EORS | RD3(dst) | RN3(arg2));
return push_inst32(compiler, EOR_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_MSHL:
FAIL_IF(push_inst32(compiler, ANDI | RD4(TMP_REG2) | RN4(arg2) | 0x1f));
arg2 = TMP_REG2;
/* fallthrough */
case SLJIT_SHL:
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))
return push_inst16(compiler, LSLS | RD3(dst) | RN3(arg2));
return push_inst32(compiler, LSL_W | (flags & SET_FLAGS) | RD4(dst) | RN4(arg1) | RM4(arg2));
case SLJIT_MLSHR:
FAIL_IF(push_inst32(compiler, ANDI | RD4(TMP_REG2) | RN4(arg2) | 0x1f));
arg2 = TMP_REG2;
/* fallthrough */
case SLJIT_LSHR:
if (dst == (sljit_s32)arg1 && IS_2_LO_REGS(dst, arg2))