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Jiongyao Ye
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2020 – today
- 2024
- [j11]Ziming Zhu, Yu Zhu, Haoran Wang, Nan Wang, Jiongyao Ye, Xiaofeng Ling:
FDTNet: Enhancing frequency-aware representation for prohibited object detection from X-ray images via dual-stream transformers. Eng. Appl. Artif. Intell. 133: 108076 (2024) - [j10]Qianwang Liang, Tianyu Yan, Nan Wang, Zhiying Zhu, Jiongyao Ye:
A Low-Latency Noise-Aware Tone Mapping Operator for Hardware Implementation with a Locally Weighted Guided Filter. Symmetry 16(3): 356 (2024) - 2023
- [j9]Qin Shi, Yu Zhu, Yatong Liu, Jiongyao Ye, Dawei Yang:
Perceiving Multiple Representations for scene text image super-resolution guided by text recognizer. Eng. Appl. Artif. Intell. 124: 106551 (2023) - [j8]Gan Cai, Yu Zhu, Yue Wu, Xiaoben Jiang, Jiongyao Ye, Dawei Yang:
A multimodal transformer to fuse images and metadata for skin disease classification. Vis. Comput. 39(7): 2781-2793 (2023) - 2022
- [j7]Fengyao Zhu, Yu Zhu, Xiaoben Jiang, Jiongyao Ye:
Cross-Domain Attention and Center Loss for Sketch Re-Identification. IEEE Trans. Inf. Forensics Secur. 17: 3421-3432 (2022)
2010 – 2019
- 2019
- [j6]Huatao Zhao, Jiongyao Ye, Takahiro Watanabe:
A Low-power Shared Cache Design with Modified PID Controller for Efficient Multicore Embedded Systems. J. Inf. Process. 27: 149-158 (2019) - 2018
- [c5]Jiongyao Ye, Yue Jin, Nan Wang:
A Novel Real-time Highway Visibility Measurement System Based on Dark Channel Prior. ICIGP 2018: 171-175 - 2017
- [c4]Nan Wang, Hengxiao Wang, Yue Jin, Jiongyao Ye:
Integrating operation scheduling and binding for functional unit power-gating in high-level synthesis. ASICON 2017: 1129-1132 - 2015
- [c3]Huatao Zhao, Jiongyao Ye, Xian Su, Takahiro Watanabe:
Application-specific shared last-level cache optimization for low-power embedded systems. NEWCAS 2015: 1-4 - 2013
- [c2]Huatao Zhao, Jiongyao Ye, Yuxin Sun, Takahiro Watanabe:
Pseudo Dual Path Processing to reduce the branch misprediction penalty in embedded processors. ASICON 2013: 1-4 - 2012
- [j5]Jiongyao Ye, Hongfeng Ding, Yingtao Hu, Takahiro Watanabe:
A Behavior-based Adaptive Access-mode for Low-power Set-associative Caches in Embedded Systems. Inf. Media Technol. 7(1): 1-11 (2012) - [j4]Jiongyao Ye, Hongfeng Ding, Yingtao Hu, Takahiro Watanabe:
A Behavior-based Adaptive Access-mode for Low-power Set-associative Caches in Embedded Systems. J. Inf. Process. 20(1): 26-36 (2012) - 2011
- [j3]Jiongyao Ye, Yingtao Hu, Hongfeng Ding, Takahiro Watanabe:
Analysis before Starting an Access: A New Power-Efficient Instruction Fetch Mechanism. IEICE Trans. Inf. Syst. 94-D(7): 1398-1408 (2011) - [j2]Jiongyao Ye, Yu Wan, Takahiro Watanabe:
An Adaptive Various-Width Data Cache for Low Power Design. IEICE Trans. Inf. Syst. 94-D(8): 1539-1546 (2011) - [j1]Jiongyao Ye, Yu Wan, Takahiro Watanabe:
A New Recovery Mechanism in Superscalar Microprocessors by Recovering Critical Misprediction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(12): 2639-2648 (2011) - [c1]Jiongyao Ye, Jiannan Jin, Takahiro Watanabe:
A behavior-based reconfigurable cache for the low-power embedded processor. ASICON 2011: 1-5
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last updated on 2024-09-02 00:11 CEST by the dblp team
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