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2020 – today
- 2022
[j22]Juan Mario Haut
, Adrián Alcolea, Mercedes Eugenia Paoletti, Javier Plaza, Javier Resano, Antonio Plaza:
GPU-Friendly Neural Networks for Remote Sensing Scene Classification. IEEE Geosci. Remote. Sens. Lett. 19: 1-5 (2022)- [j21]Adrián Alcolea, Javier Resano:
Bayesian Neural Networks to Analyze Hyperspectral Datasets Using Uncertainty Metrics. IEEE Trans. Geosci. Remote. Sens. 60: 1-10 (2022) - 2020
- [j20]Adrián Alcolea, Mercedes Eugenia Paoletti, Juan Mario Haut, Javier Resano, Antonio Plaza:
Inference in Supervised Spectral Classifiers for On-Board Hyperspectral Imaging: An Overview. Remote. Sens. 12(3): 534 (2020) - [j19]Adrián Alcolea Morena, Javier Olivito, Javier Resano, Hortensia Mecha:
Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 28(9): 1993-2003 (2020)
2010 – 2019
- 2019
- [c20]Alejandro Valero, Darío Suárez Gracia, Ruben Gran Tejero, Luis M. Ramos, Agustín Navarro-Torres, Adolfo Muñoz, Joaquín Ezpeleta, José Luis Briz, Ana C. Murillo, Eduardo Montijano, Javier Resano, María Villarroya-Gaudó, Jesús Alastruey-Benedé, Enrique F. Torres, Pedro Álvarez, Pablo Ibáñez, Víctor Viñals:
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer. WCAE@ISCA 2019: 5:1-5:8 - 2018
- [j18]Javier Olivito, Felipe Serrano, Juan Antonio Clemente, Hortensia Mecha, Javier Resano:
Analysis of the reconfiguration latency and energy overheads for a Xilinx Virtex-5 field-programmable gate array. IET Comput. Digit. Tech. 12(4): 150-157 (2018) - 2017
- [j17]Javier Olivito, Javier Resano, José Luis Briz:
Accelerating Board Games Through Hardware/Software Codesign. IEEE Trans. Comput. Intell. AI Games 9(4): 393-401 (2017) - 2016
- [j16]Juan Antonio Clemente, Ruben Gran, Abel Chocano, Carlos del Prado, Javier Resano:
Hardware Architectural Support for Caching Partitioned Reconfigurations in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 530-543 (2016) - 2015
- [j15]Javier Olivito, Ruben Gran, Javier Resano, Carlos González, Enrique F. Torres:
Performance and energy efficiency analysis of a Reversi player for FPGAs and General Purpose Processors. Microprocess. Microsystems 39(2): 64-73 (2015) - 2014
- [j14]Juan Antonio Clemente, Javier Resano, Daniel Mozos:
An approach to manage reconfigurations and reduce area cost in hard real-time reconfigurable systems. ACM Trans. Embed. Comput. Syst. 13(4): 90:1-90:24 (2014) - [j13]Juan Antonio Clemente, Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Configuration Mapping Algorithms to Reduce Energy and Time Reconfiguration Overheads in Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1248-1261 (2014) - [c19]Javier Olivito, Alberto Delmas, Javier Resano:
An improved FPGA-based specific processor for Blokus Duo. FPT 2014: 366-369 - 2013
- [j12]Carlos González, Sergio Sánchez, Abel Paz, Javier Resano, Daniel Mozos, Antonio Plaza:
Use of FPGA or GPU-based architectures for remotely sensed hyperspectral image processing. Integr. 46(2): 89-103 (2013) - [j11]Sebastián López, Tanya Vladimirova, Carlos González, Javier Resano, Daniel Mozos, Antonio Plaza:
The Promise of Reconfigurable Computing for Hyperspectral Imaging Onboard Systems: A Review and Trends. Proc. IEEE 101(3): 698-722 (2013) - [c18]Javier Olivito, Carlos González, Javier Resano:
An FPGA-based specific processor for Blokus Duo. FPT 2013: 502-505 - 2012
- [j10]Carlos González, Javier Resano, Antonio Plaza, Daniel Mozos:
FPGA Implementation of Abundance Estimation for Spectral Unmixing of Hyperspectral Data Using the Image Space Reconstruction Algorithm. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 5(1): 248-261 (2012) - [j9]Carlos González, Daniel Mozos, Javier Resano, Antonio Plaza:
FPGA Implementation of the N-FINDR Algorithm for Remotely Sensed Hyperspectral Image Analysis. IEEE Trans. Geosci. Remote. Sens. 50(2): 374-388 (2012) - 2011
- [j8]Juan Antonio Clemente, Javier Resano, Carlos González, Daniel Mozos:
A Hardware Implementation of a Run-Time Scheduler for Reconfigurable Systems. IEEE Trans. Very Large Scale Integr. Syst. 19(7): 1263-1276 (2011) - [c17]Stephen Williams, Masoud Agah, Luiz A. DaSilva, Kamyar Dezhgosha, Allen B. MacKenzie, Nicky Mostert-Phipps, Sanjay Raman, Javier Resano:
Mini workshop - Real World Engineering Projects: Discovery-based curriculum modules for first-year students. FIE 2011: S1 - [c16]Juan Antonio Clemente, Daniel Mozos, Javier Resano:
A Replacement Technique to Maximize Task Reuse in Reconfigurable Systems. IPDPS Workshops 2011: 250-257 - 2010
- [j7]Carlos González, Javier Resano, Daniel Mozos, Antonio Plaza, David Valencia:
FPGA Implementation of the Pixel Purity Index Algorithm for Remotely Sensed Hyperspectral Image Analysis. EURASIP J. Adv. Signal Process. 2010 (2010) - [j6]Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos:
A task graph execution manager for reconfigurable multi-tasking systems. Microprocess. Microsystems 34(2-4): 73-83 (2010) - [c15]Carlos González, Daniel Mozos, Javier Resano, Antonio Plaza:
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images. ERSA 2010: 293- - [c14]Javier Olivito, Carlos González, Javier Resano:
FPGA implementation of a strong Reversi player. FPT 2010: 507-510
2000 – 2009
- 2009
- [c13]Carlos González, Daniel Mozos, Javier Resano:
FPGA support for satellite computations of hyper spectral images. FPL 2009: 715-716 - 2008
- [j5]Javier Resano, Juan Antonio Clemente, Carlos González, Daniel Mozos, Francky Catthoor:
Efficiently scheduling runtime reconfigurations. ACM Trans. Design Autom. Electr. Syst. 13(4): 58:1-58:12 (2008) - [c12]Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos:
A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems. ReConFig 2008: 79-84 - 2007
- [j4]Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Memory hierarchy for high-performance and energyaware reconfigurable systems. IET Comput. Digit. Tech. 1(5): 565-571 (2007) - [c11]Javier Resano, Juan Antonio Clemente, Carlos González, Jose Luis Garcia, Daniel Mozos:
HW implementation of an execution manager for reconfigurable systems. ERSA 2007: 71-77 - [c10]Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
Reducing the reconfiguration overhead: a survey of techniques. ERSA 2007: 191-194 - [i1]Javier Resano, Daniel Mozos, Francky Catthoor:
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware. CoRR abs/0710.4796 (2007) - 2006
- [c9]Elena Perez Ramo, Javier Resano:
A Dual Cache for Performance and Energy Aware Reconfigurable HW. FPL 2006: 1-2 - [c8]Elena Perez Ramo, Javier Resano, Daniel Mozos, Francky Catthoor:
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead. IPDPS 2006 - 2005
- [j3]Javier Resano, Daniel Mozos, Diederik Verkest, Francky Catthoor:
A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Des. Test Comput. 22(5): 452-460 (2005) - [c7]Javier Resano, Daniel Mozos, Francky Catthoor:
A Hybrid Prefetch Scheduling Heuristic to Minimize at Run-Time the Reconfiguration Overhead of Dynamically Reconfigurable Hardware. DATE 2005: 106-111 - 2004
- [j2]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. Microprocess. Microsystems 28(5-6): 291-301 (2004) - [c6]Javier Resano, Daniel Mozos:
Specific scheduling support to minimize the reconfiguration overhead of dynamically reconfigurable hardware. DAC 2004: 119-124 - [c5]Javier Resano:
A Specific Scheduling Flow for Dynamically Reconfigurable Hardware. FPL 2004: 1178-1179 - 2003
- [j1]Javier Resano, M. Elena Pérez, Daniel Mozos, Hortensia Mecha, Julio Septién:
Analyzing communication overheads during hardware/software partitioning. Microelectron. J. 34(11): 1001-1007 (2003) - [c4]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. ESTIMedia 2003: 156-162 - [c3]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor:
Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. FCCM 2003: 278-279 - [c2]Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor:
Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. FPL 2003: 585-594 - [c1]Javier Resano, Daniel Mozos, Elena Pérez-Miñana, Hortensia Mecha, Julio Septién:
A Hardware/Software Partitioning and Scheduling Approach for Embedded Systems with Low-Power and High Performance Requirements. PATMOS 2003: 580-589
Coauthor Index
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