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Yung-Chi Chang
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2020 – today
- 2024
- [c14]Wei-Chung Lin, Yung-Chi Chang, Yung-Hui Chung:
A 10b 400MS/s 2x-Time-Interleaved 2-Then-1b/Cycle SAR ADC in 90nm CMOS. ISCAS 2024: 1-5
2010 – 2019
- 2016
- [j9]Chih-Kun Ke, Young-Long Chen, Yung-Chi Chang, Yu-Ling Zeng:
Opportunistic large array concentric routing algorithms with relay nodes for wireless sensor networks. Comput. Electr. Eng. 56: 350-365 (2016) - 2014
- [j8]Young-Long Chen, Mu-Yen Chen, Fu-Kai Cheung, Yung-Chi Chang:
A new hybrid architecture with an intersection-based coverage algorithm in wireless sensor networks. Comput. Sci. Inf. Syst. 11(3): 1017-1035 (2014) - 2013
- [c13]Young-Long Chen, Fu-Kai Cheung, Yung-Chi Chang:
A Low-Energy Adaptive Clustering Hierarchy Architecture with an Intersection-Based Coverage Algorithm in Wireless Sensor Networks. IMIS 2013: 622-625 - 2011
- [j7]Chuan-Yu Chang, ChunHsi Li, Yung-Chi Chang, MuDer Jeng:
Wafer defect inspection by neural analysis of region features. J. Intell. Manuf. 22(6): 953-964 (2011)
2000 – 2009
- 2009
- [c12]Chuan-Yu Chang, Yung-Chi Chang, ChunHsi Li, MuDer Jeng:
Automatic Die Inspection for Post-sawing LED Wafers. SMC 2009: 1615-1620 - 2007
- [j6]Ji-Liang Shi, Tian-Hua Liu, Yung-Chi Chang:
Position Control of an Interior Permanent-Magnet Synchronous Motor Without Using a Shaft Position Sensor. IEEE Trans. Ind. Electron. 54(4): 1989-2000 (2007) - 2006
- [j5]Yung-Chi Chang, Wei-Min Chao, Chih-Wei Hsu, Liang-Gee Chen:
Platform-Based MPEG-4 SOC Design for Video Communications. J. VLSI Signal Process. 42(1): 7-19 (2006) - [j4]Yung-Chi Chang, Chih-Wei Hsu, Wei-Min Chao, Liang-Gee Chen:
Interactive Content-aware Video Streaming System with Fine Granularity Scalability. J. VLSI Signal Process. 44(1-2): 117-134 (2006) - 2005
- [j3]Po-Chih Tseng, Yung-Chi Chang, Yu-Wen Huang, Hung-Chi Fang, Chao-Tsung Huang, Liang-Gee Chen:
Advances in Hardware Architectures for Image and Video Coding - A Survey. Proc. IEEE 93(1): 184-197 (2005) - [j2]Yung-Chi Chang, Chao-Chih Huang, Wei-Min Chao, Liang-Gee Chen:
An Efficient Embedded Bitstream Parsing Processor for MPEG-4 Video Decoding System. J. VLSI Signal Process. 41(2): 183-191 (2005) - [c11]Chung-Jr Lian, Yu-Wen Huang, Hung-Chi Fang, Yung-Chi Chang, Liang-Gee Chen:
PEG, MPEG-4, and H.264 Codec IP Development. DATE 2005: 1118-1119 - 2004
- [c10]Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen:
MPEG-4 FGS Encoder Design for an Interactive Content-aware MPEG-4 Video Streaming SOC. IWSOC 2004: 172-175 - 2003
- [c9]Wei-Min Chao, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen:
Platform architecture design for MEG-4 video coding. ICIP (3) 2003: 93-96 - [c8]Chih-Wei Hsu, Yung-Chi Chang, Wei-Min Chao, Liang-Gee Chen:
Hardware-oriented optimization and block-level architecture design for MPEG-4 FGS encoder. ISCAS (2) 2003: 784-787 - [c7]Wei-Min Chao, Tung-Chien Chen, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen:
Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple Profile. ISCAS (2) 2003: 788-791 - 2002
- [j1]Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-Ming Chao, Liang-Gee Chen:
VLSI architecture design of MPEG-4 shape coding. IEEE Trans. Circuits Syst. Video Technol. 12(9): 741-751 (2002) - [c6]Chih-Wei Hsu, Wei-Min Chao, Yung-Chi Chang:
Texture coder design of MPEG4 video by using interleaving schedule. ICME (2) 2002: 157-160 - 2001
- [c5]Chung-Jr Lian, Liang-Gee Chen, Hao-Chieh Chang, Yung-Chi Chang:
Design and implementation of JPEG encoder IP core. ASP-DAC 2001: 29-30 - [c4]Yung-Chi Chang, Chao-Chih Huang, Hao-Chieh Chang, Hung-Chi Fang, Liang-Gee Chen:
Error-Propagation Analysis and Concealment Strategy for MPEG-4 Video Bitstream with Data Partitioning. ICME 2001 - 2000
- [c3]Hao-Chieh Chang, Yung-Chi Chang, Yuan-Bin Tsai, Chih-Peng Fan, Liang-Gee Chen:
MPEG-4 video bitstream structure analysis and its parsing architecture design. ISCAS 2000: 184-187 - [c2]Hao-Chieh Chang, Liang-Gee Chen, Mei-Yun Hsu, Yung-Chi Chang:
Performance analysis and architecture evaluation of MPEG-4 video codec system. ISCAS 2000: 449-452
1990 – 1999
- 1999
- [c1]Hao-Chieh Chang, Liang-Gee Chen, Yung-Chi Chang, Sheng-Chieh Huang:
A VLSI architecture design of VLC encoder for high data rate video/image coding. ISCAS (4) 1999: 398-401
Coauthor Index
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