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Merits of CMOS/SIMOX technology for low-voltage SRAM macros / Kumagai, K ; Iwaki, H ; Yamada, T ; Nakamura, H ; Onishi, H ; Matsubara, Y ; Imai, K ; Kurosawa, S
A 128-kbit SRAM (static random access memory) macro with the 0.35 mu m FD (fully-depleted) CMOS/SIMOX (separation by implantation of oxygen) technology has been developed to demonstrate the merits of that technology for low-voltage $9 applications. Its access time at Vdd =1.5 V was comparable with that obtained with the 0.35 mu m standard bulk CMOS technology at Vdd=3.3 V, due to the combination of the small S/D capacitance and the small back-bias effect. [...]
1999 - Published in : NEC Res. Dev.: 40 (1999) , no. 3, pp. 287-91

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