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Time performance of Analog Pixel Test Structures with in-chip operational amplifier implemented in 65 nm CMOS imaging process / Rinella, Gianluca Aglieri (CERN) ; Aglietta, Luca (INFN, Turin ; Turin U.) ; Antonelli, Matias (INFN, Trieste) ; Barile, Francesco (INFN, Bari ; Bari U.) ; Benotto, Franco (INFN, Turin) ; Beolè, Stefania Maria (INFN, Turin ; Turin U.) ; Botta, Elena (INFN, Turin ; Turin U.) ; Bruno, Giuseppe Eugenio (Bari Polytechnic ; INFN, Bari) ; Carnesecchi, Francesca (CERN) ; Colella, Domenico (INFN, Bari ; Bari U.) et al.
In the context of the CERN EP R&D; on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel operational-amplifier-based buffering for a small matrix of four by four pixels, with a sensor with a small collection electrode and a very non-uniform electric field, was designed to allow detailed characterization of the pixel performance in this technology. [...]
arXiv:2407.18528.- 2024-11-12 - 27 p. - Published in : Nucl. Instrum. Methods Phys. Res., A 1070 (2025) 170034 Fulltext: PDF;

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Gridpix: TPC development on the right track : The development and characterisation of a TPC with a CMOS pixel chip read out / Fransen, Martin
CERN-THESIS-2012-113 - 191 p.

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Veja também: nomes de autores similares
3	Fransen, M
1	Fransen, M J
2	Fransen, M.

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