CERN Accelerating science

Article
Title HKROC: an integrated front-end ASIC to readout photomultiplier tubes for the Hyper-Kamiokande experiment
Author(s) Conforti Di Lorenzo, S (Ec. Polytech., OMEGA) ; Afiri, A (Ecole Polytechnique) ; Bolognesi, S (IRFU, Saclay) ; Bombardi, G (CERN) ; Bouyjou, F (IRFU, Saclay) ; Callier, S (Ec. Polytech., OMEGA) ; De La Taille, C (Ec. Polytech., OMEGA) ; Dinaucourt, P (Ec. Polytech., OMEGA) ; Drapier, O (Ecole Polytechnique) ; Dulucq, F (Ec. Polytech., OMEGA) ; El Berni, A (Ec. Polytech., OMEGA) ; Extier, S (Ec. Polytech., OMEGA) ; Firlej, M (AGH-UST, Cracow) ; Fiutowski, T A (AGH-UST, Cracow) ; Gastaldi, F (Ecole Polytechnique) ; Guilloux, F (CERN) ; Idzik, M (AGH-UST, Cracow) ; Marchioro, A (CERN) ; Mghazli, A (Ec. Polytech., OMEGA) ; Molenda, A (AGH-UST, Cracow) ; Moron, J (AGH-UST, Cracow) ; Nanni, J (Ecole Polytechnique) ; Quilain, B (Ecole Polytechnique) ; Raux, L (Ec. Polytech., OMEGA) ; Swientek, K P (AGH-UST, Cracow) ; Thienpont, D (Ec. Polytech., OMEGA) ; Vergine, T (CERN)
Publication 2023
Number of pages 7
In: JINST 18 (2023) C01035
In: Topical Workshop on Electronics for Particle Physics 2022 (TWEPP 2022), Bergen, Norway, 19 - 23 Sep 2022, pp.C01035
DOI 10.1088/1748-0221/18/01/C01035
Subject category Detectors and Experimental Techniques
Abstract The HKROC ASIC was originally designed to readout the photomultiplier tubes (PMTs) for the Hyper-Kamiokande (HK) experiment. HKROC is a very innovative ASIC capable of readout a large number of channels satisfying stringent requirements in terms of noise, speed and dynamic range. Each HKROC channel features a low-noise preamplifier and shapers, a 10-bit successive approximation Analog-to-Digital Converter (SAR-ADC) (designed by AGH Krakow) for the charge measurement (up to 2500 pC) and a Time-to-Digital Converter (TDC) (designed by CEA IRFU group) for the Time-of-Arrival (ToA) measurement with 25 ps binning. HKROC is auto-triggered and includes all necessary ancillary services as bandgap circuit, PLL (Phase-locked loop) and threshold DACs (Digital to Analog Converters). This paper will describe the ASIC architecture and the experimental results of the first HKROC prototype received in January 2022.
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 Δημιουργία εγγραφής 2023-06-14, τελευταία τροποποίηση 2023-06-14