CERN Accelerating science

Published Articles
Title GPU real-time processing in NA62 trigger system
Author(s) Ammendola, R (INFN, Rome2) ; Biagioni, A (INFN, Rome) ; Chiozzi, S (INFN, Ferrara) ; Cretaro, P (INFN, Rome) ; Di Lorenzo, S (Pisa U. ; INFN, Pisa) ; Fantechi, R (INFN, Pisa) ; Fiorini, M (Ferrara U. ; INFN, Ferrara) ; Frezza, O (INFN, Rome) ; Lamanna, G (Frascati) ; Lo Cicero, F (INFN, Rome) ; Lonardo, A (INFN, Rome) ; Martinelli, M (INFN, Rome) ; Neri, I (INFN, Ferrara) ; Paolucci, P S (INFN, Rome) ; Pastorelli, E (INFN, Rome) ; Piandani, R (INFN, Pisa) ; Piccini, M (INFN, Perugia) ; Pontisso, L (INFN, Pisa) ; Rossetti, D (Haimson Res., Santa Clara) ; Simula, F (INFN, Rome) ; Sozzi, M (Pisa U. ; INFN, Pisa) ; Vicini, P (INFN, Rome)
Collaboration NA62
Publication 2017
Number of pages 4
In: J. Phys.: Conf. Ser. 800 (2017) 012046
In: International Conference on Kaon Physics, Birmingham, United Kingdom, 14-17 Sep 2016, pp.012046
DOI 10.1088/1742-6596/800/1/012046
Subject category Detectors and Experimental Techniques
Accelerator/Facility, Experiment CERN SPS ; NA62
Abstract A commercial Graphics Processing Unit (GPU) is used to build a fast Level 0 (L0) trigger system tested parasitically with the TDAQ (Trigger and Data Acquisition systems) of the NA62 experiment at CERN. In particular, the parallel computing power of the GPU is exploited to perform real-time fitting in the Ring Imaging CHerenkov (RICH) detector. Direct GPU communication using a FPGA-based board has been used to reduce the data transmission latency. The performance of the system for multi-ring reconstrunction obtained during the NA62 physics run will be presented.
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