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Report number	FERMILAB-PUB-16-532-CD
Title	A 4×8-Gbps VCSEL array driver ASIC and integration with a custom array transmitter module for the LHC front-end transmission
Author(s)	Guo, Di (Southern Methodist U. ; Hefei, CUST) ; Liu, Chonghan (Southern Methodist U.) ; Chen, Jinghong (Houston U.) ; Chramowicz, John (Fermilab) ; Gong, Datao (Southern Methodist U.) ; He, Huiqin (Southern Methodist U. ; Shenzhen, SUSTC) ; Hou, Suen (Taiwan, Inst. Phys.) ; Liu, Tiankuan (Southern Methodist U.) ; Prosser, Alan (Fermilab) ; Teng, Ping-Kun (Taiwan, Inst. Phys.) ; Xiang, Annie C (Southern Methodist U.) ; Xiao, Le (Southern Methodist U. ; Hua-Zhong Normal U.) ; Ye, Jingbo (Southern Methodist U.)
Publication	2016
Number of pages	7
In:	Nucl. Instrum. Methods Phys. Res., A 831 (2016) 276-282
In:	10th International "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors, Xi'an, China, 25 - 29 Sep 2015, pp.276-282
DOI	10.1016/j.nima.2016.03.065
Subject category	Detectors and Experimental Techniques
Accelerator/Facility, Experiment	CERN LHC ; CMS
Abstract	This paper describes the design, fabrication and experiment results of a 4×8-Gbps Vertical-Cavity Surface-Emitting Laser (VCSEL) array driver ASIC with the adjustable active-shunt peaking technique and the novel balanced output structure under the Silicon-on-Sapphire (SOS) process, and a custom array optical transmitter module, featuring a compact size of 10 mm×15 mm×5.3 mm. Both the array driver ASIC and the module have been fully tested after integration as a complete parallel transmitter. Optical eye diagram of each channel passes the eye mask at 8 Gbps/ch with adjacent channel working simultaneously with a power consumption of 150 mW/ch. The optical transmission of Bit-Error Rate (BER) less than 10E-12 is achieved at an aggregated data rate of 4×8-Gbps.
Copyright/License	Elsevier B.V.

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