CERN Accelerating science

ATLAS Slides
Report number	ATL-DAQ-SLIDE-2011-233
Title	The EDRO board connected to the Associative Memory: a "Baby" FastTracKer processor for the ATLAS experiment
Author(s)	Annovi, A (INFN Frascati) ; Beretta, M (INFN Frascati) ; Villa, M (INFN Bologna / Universita` di Bologna) ; Bevacqua, V (INFN Pisa / Universita` di Pisa) ; Vitillo, R A (INFN Pisa / Universita` di Pisa) ; Giorgi, F (INFN Bologna) ; Magalotti, D (Universita` di Perugia) ; Roda, C (INFN Pisa / Universita` di Pisa) ; Cervigni, F (INFN Pisa / Universita` di Pisa) ; Giannetti, P (INFN Pisa / Universita` di Pisa) ; Negri, A (INFN Pavia) ; Piendibene, M (INFN Pisa / Universita` di Pisa) ; Volpi, G (University of Chicago) ; Fabbri, L (INFN Bologna) ; Sbarra, C (INFN Bologna)
Corporate author(s)	The ATLAS collaboration
Submitted to	2nd International Conference on Technology and Instrumentation in Particle Physics, Chicago, IL, USA, 9 - 14 Jun 2011
Submitted by	[email protected] on 06 Jun 2011
Subject category	Detectors and Experimental Techniques
Accelerator/Facility, Experiment	CERN LHC ; ATLAS
Free keywords	FTK ; TDAQ ; Associative Memory ; EDRO ; TIPP11
Abstract	The FastTracKer (FTK) is a dedicated hardware system able to perform online fast and precise track reconstruction of the full events at the Atlas experiment, within an average latency of few dozens of microseconds. It is made of two pipelined processors: the Associative Memory (AM), finding low precision tracks called "roads", and the Track Fitter (TF), refining the track quality with high precision fits. The FTK design [1] that works well at the Large Hadron Collider (LHC) Phase I luminosity requires the best of the available technology for tracking in high occupancy conditions. While the new processor is designed for the most demanding LHC conditions, we want to use already existing prototypes, part of them developed for the SLIM5 collaboration [2], to exercise the FTK functions in the new Atlas environment. During Laboratory tests, the EDRO board (Event Dispatch and Read-Out) receives on a clustering mezzanine (able to calculate the pixel and SCT cluster centroids) "fake" detector raw data on S-links from a "pseudo front-end" (a CPU). Then the whole system will grow to become the FTK "Vertical Slice": at this point it will be possible to perform tests on real data in ATLAS during beam time. The clusters are transferred through the P3 connector to the AM board that finds roads, to be provided back to the EDRO. The EDRO delivers back to the CPU the found roads using an S-link connection. The EDRO will have also the capability to associate roads with their internal clusters to be provided to the TF that initially will be the GigaFitter developed for the SVT processor at CDF [3]. Our goal is to take the first data before the end of the 2012 run. The vertical slice will cover a small projective tower in the detector, but it will be a demonstrator since it will be functionally complete. We report on the performances and structure of the first nucleus of the vertical slice, including the pixel/strip hit clustering (clustering mezzanine), hit organization and distribution (EDRO) and the Associative Memory road funding function. [1] A. Andreani et al., The FastTracker Real Time Processor and Its Impact on Muon Isolation, Tau and b-Jet Online Selections at ATLAS, Conference Record 17th IEEE NPSS Real Time Conference Record of the 17th Real Time Conference, Lisbon, Portugal, 24 - 28 May 2010. [2] S. Bettarini et al., The SLIM5 low mass silicon tracker demonstrator, Nuclear Instruments and Methods in Physics Research A 623 (2010) 942–953 [3] S. Amerio et al., GigaFitter: Performance at CDF and perspective for future applications, Nuclear Instruments and Methods in Physics Research A 623(2010)540–542