002900811 001__ 2900811
002900811 005__ 20240626131350.0
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002900811 110__ $$aCERN. Geneva
002900811 111__ $$92024-06-11T14:40:00$$a1st FPGA Developers' Forum (FDF) meeting$$cCERN - 30/7-018 - Kjell Johnsen Auditorium$$g1381060c4$$z2024-06-11T15:10:00
002900811 245__ $$aBest practices to open-source FPGA designs
002900811 260__ $$c2024
002900811 269__ $$c2024-06-11
002900811 300__ $$a2867
002900811 340__ $$aStreaming video
002900811 490__ $$aFPGA Developers' Forum (FDF)
002900811 490__ $$a1st FPGA Developers' Forum (FDF) meeting
002900811 518__ $$d2024-06-11T14:40:00
002900811 520__ $$a<!--HTML-->Open Source revolutionised software development by promoting collaboration, innovation, and openness. As FPGA designers, you can leverage this approach and share your HDL designs with the world.
In this presentation, we will discuss a step-by-step process to help you open-source your HDL designs effectively. We will begin by addressing the key question of where to host your HDL. We will then provide guidance on selecting an appropriate licence. Essential elements to ensure a smooth collaboration experience include setting up version control, issue management, documentation, verification and testing procedures. After a brief description of these best practices, we will show how adopting them can encourage contributions, and help maintain high quality in your project. Lastly, we will examine the role of your employer in open-sourcing FPGA designs, using CERN as an example and describing how its newly-established Open Source Program Office (OSPO) can help in this process.
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002900811 65017 $$aFPGA Developers' Forum (FDF)
002900811 65027 $$aEvent
002900811 690C_ $$aTALK
002900811 690C_ $$aCERN
002900811 700__ $$aSerrano, Javier$$espeaker$$uCERN
002900811 859__ [email protected]
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002900811 906__ $$pCieri, Davide$$uMax Planck Society (DE)
002900811 906__ $$pGonnella, Francesco$$uUniversity of Birmingham (GB)
002900811 961__ $$c2024-06-14T15:53:46$$x2024-02-08T11:44:00
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