Title
| FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution. |
Video
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Author(s)
| Ferrero, Marco (speaker) (Universita e INFN Torino (IT)) ; Martinez Rojas, Alejandro David (speaker) (INFN - National Institute for Nuclear Physics) |
Corporate author(s)
| CERN. Geneva |
Imprint
| 2021-09-22. - 995. |
Series
| (Conferences) (TWEPP 2021 Topical Workshop on Electronics for Particle Physics) |
Lecture note
| on 2021-09-22T15:00:00
|
Subject category
| Conferences |
Abstract
| We present the first results obtained with the FAST2 family of ASICs. The FAST2 ASIC family, designed in the 110 nm CMOS technology, has been optimized for the read-out of Ultra-Fast Silicon Detectors, aiming to achieve a combined total time resolution of less than 40 ps. In the FAST2 family, the ASIC (FAST2_A) presents 16 channels and has only the amplification stage with a timing jitter lower than 16 ps experimentally, and power dissipation of 1 mW/ch. |
Copyright/License
| © 2021-2024 CERN |
Submitted by
| angela.ricci@cern.ch |