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Published Articles | |
Title | Radiation-hard/high-speed parallel optical links |
Author(s) | Gan, K K (Ohio State U.) ; Buchholz, P (Siegen U.) ; Kagan, H P (Ohio State U.) ; Kass, R D (Ohio State U.) ; Moore, J (Ohio State U.) ; Smith, D S (Ohio State U.) ; Wiese, A (Siegen U.) ; Ziolkowski, M (Siegen U.) |
Publication | 2014 |
Number of pages | 5 |
In: | Nucl. Instrum. Methods Phys. Res., A 765 (2014) 64-68 |
In: | 9th International "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors, Hiroshima, Japan, 2 - 6 Sep 2013, pp.64-68 |
DOI | 10.1016/j.nima.2014.05.026 |
Subject category | Detectors and Experimental Techniques |
Accelerator/Facility, Experiment | CERN LHC ; ATLAS |
Abstract | We have designed an ASIC for use in a parallel optical engine for a new layer of the ATLAS pixel detector in the initial phase of the LHC luminosity upgrade. The ASIC is a 12-channel VCSEL (Vertical Cavity Surface Emitting Laser) array driver capable of operating up to 5 Gb/s per channel. The ASIC is designed using a 130 nm CMOS process to enhance the radiation-hardness. A scheme for redundancy has also been implemented to allow bypassing of a broken VCSEL. The ASIC also contains a power-on reset circuit that sets the ASIC to a default configuration with no signal steering. In addition, the bias and modulation currents of the individual channels are programmable. The performance of the first prototype ASIC up to 5 Gb/s is satisfactory. Furthermore, we are able to program the bias and modulation currents and to bypass a broken VCSEL channel. We are currently upgrading our design to allow operation at 10 Gb/s per channel yielding an aggregated bandwidth of 120 Gb/s. Some preliminary results of the design will be presented. |
Copyright/License | Elsevier B.V. |