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Author(s)
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Abbon, P (DSM, DAPNIA, Saclay) ; Delagnes, E (DSM, DAPNIA, Saclay) ; Deschampbs, H (DSM, DAPNIA, Saclay) ; Kunne, F (DSM, DAPNIA, Saclay) ; Gerasimov, S (Munich, Tech. U.) ; Ketzer, B (Munich, Tech. U.) ; Konorov, I (Munich, Tech. U.) ; Kravtchuk, N (Dubna, JINR) ; Magnon, A (DSM, DAPNIA, Saclay) ; Neyret, D (DSM, DAPNIA, Saclay) ; Panebianco, S (DSM, DAPNIA, Saclay) ; Paul, S (Munich, Tech. U.) ; Rebourgeard, P (DSM, DAPNIA, Saclay) ; Tessaroto, F (INFN, Trieste ; Trieste U.) |
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Abstract
| A new readout system for CsI-coated MWPCs, used in the COMPASS RICH detector, has been proposed and tested in nominal high-rate conditions. It is based on the APV25-S1 analog sampling chip, and will replace the Gassiplex chip readout used up to now. The APV chip, originally designed for silicon microstrip detectors, is shown to perform well even with “slow” signals from a MWPC, keeping a signal-to-noise ratio of 9. For every trigger the system reads three consecutive in-time samples, thus allowing to extract information on the signal shape and its timing. The effective time window is reduced from ∼3 μs for the Gassiplex to below 400 ns for the APV25-S1 chip, reducing pile-up events at high particle rate. A significant improvement of the signal-to-background ratio by a factor 5–6 with respect to the original readout has been measured in the central region of the RICH detector. Due to its pipelined architecture, the new readout system also considerably reduces the dead time per event, allowing efficient data taking at higher trigger rate. |