001380639 001__ 1380639
001380639 005__ 20190531093932.0
001380639 0248_ $$aoai:cds.cern.ch:1380639$$pINIS$$pcerncds:CERN:FULLTEXT$$pcerncds:THESES$$pcerncds:FULLTEXT$$pcerncds:CERN
001380639 035__ $$9Inspire$$a1231385
001380639 037__ $$aCERN-THESIS-2011-084
001380639 041__ $$aeng
001380639 100__ $$aKoch, Manuel$$uBonn U.
001380639 245__ $$aDevelopment of a Test Environment for the Characterization of the Current Digitizer Chip DCD2 and the DEPFET Pixel System for the Belle II Experiment at SuperKEKB
001380639 300__ $$a118 p
001380639 502__ $$aPhD$$bBonn U.$$c2011
001380639 500__ $$aPresented 05 Sep 2011
001380639 520__ $$aThe future super flavor factory SuperKEKB with its detector system Belle II offers precision physics measurements to verify the Standard Model or probe undiscovered phenomena beyond its limits. A two layer vertex pixel detector is built based on the DEPFET technology. The Depleted Field Effect Transistor (DEPFET) pixel structure is an advanced type of silicon semiconductor detector, which provides simultaneously position sensitive detector capabilities and internal amplification. Fast and low noise readout of large area DEPFET sensors with row rates of 10MHz is required. A new readout chip, the Drain Current Digitizer (DCD2), is available, which allows parallel readout of multiple channels with on-chip signal digitization. For the full characterization of this ASIC a FPGA based readout system has been designed, which also allows the operation of a prototype system including a DEPFET sensor. In this thesis, detailed measurements of the standalone performance of the DCD2 and the full system are presented; a limit on the possible readout speed of a large DEPFET sensor is established, and a switch from the slower double sampling readout scheme to a faster single sampling scheme is motivated.
001380639 595__ $$aCERN EDS
001380639 595__ $$acern connection according to author: The DEPFET collaboration, including myself, has a yearly test beam at CERN facilities, where the readout system developed in my thesis has been and still is used. The developed hardware in my thesis is partially used by members of the ATLAS collaboration in Bonn for tests related to serial powering and bit-error-rate testing
001380639 65017 $$2SzGeCERN$$aDetectors and Experimental Techniques
001380639 690C_ $$aCERN
001380639 690C_ $$aTHESIS
001380639 693__ $$aSuperKEKB$$eBELLE-II RE20
001380639 701__ $$aWermes, N$$edir.$$uBonn U.
001380639 701__ $$aDesch, K$$edir.$$uBonn U.
001380639 710__ $$5PH
001380639 859__ [email protected]
001380639 8564_ $$uhttp://cds.cern.ch/record/1380639/files/CERN-THESIS-2011-084.pdf
001380639 8564_ $$uhttp://cds.cern.ch/record/1380639/files/CERN-THESIS-2011-084.gif?subformat=icon$$xicon
001380639 8564_ $$uhttp://cds.cern.ch/record/1380639/files/CERN-THESIS-2011-084.gif?subformat=icon-700$$xicon-700
001380639 916__ $$sn$$w201136$$ya2011
001380639 960__ $$a14
001380639 963__ $$aPUBLIC
001380639 970__ $$a000717100CER
001380639 980__ $$aTHESIS